[PATCH V6 1/3] tools: header: arm64: Replace TCR_NFD[0|1] with TCR_EL1_NFD[0|1]
Catalin Marinas
catalin.marinas at arm.com
Mon Nov 3 09:31:27 PST 2025
On Mon, Oct 13, 2025 at 10:59:43AM +0530, Anshuman Khandual wrote:
> Replace TCR_NFD[0|1] (used in TCR_CLEAR_FUJITSU_ERRATUM_010001) with field
> definitions which are available in tool sysreg format. Helps in completely
> dropping off the adhoc TCR_NFD[0|1] macros later.
>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Cc: Arnaldo Carvalho de Melo <acme at redhat.com>
> Cc: Namhyung Kim <namhyung at kernel.org>
> Cc: Leo Yan <leo.yan at arm.com>
> Cc: linux-kernel at vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual at arm.com>
> ---
> tools/arch/arm64/include/asm/cputype.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/arch/arm64/include/asm/cputype.h b/tools/arch/arm64/include/asm/cputype.h
> index 139d5e87dc95..dfa12df5e290 100644
> --- a/tools/arch/arm64/include/asm/cputype.h
> +++ b/tools/arch/arm64/include/asm/cputype.h
> @@ -243,7 +243,7 @@
> /* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
> #define MIDR_FUJITSU_ERRATUM_010001 MIDR_FUJITSU_A64FX
> #define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_CPU_VAR_REV(1, 0))
> -#define TCR_CLEAR_FUJITSU_ERRATUM_010001 (TCR_NFD1 | TCR_NFD0)
> +#define TCR_CLEAR_FUJITSU_ERRATUM_010001 (TCR_EL1_NFD1 | TCR_EL1_NFD0)
Isn't this file usually updated automatically (well, someone running a
script to sync) from the corresponding arch/arm64/ one?
--
Catalin
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