[PATCH v4 05/11] coresight: etm4x: Ensure context synchronization is not ignored
Leo Yan
leo.yan at arm.com
Mon Nov 3 03:03:33 PST 2025
On Mon, Oct 27, 2025 at 09:49:39AM +0000, Suzuki Kuruppassery Poulose wrote:
> On 24/10/2025 17:45, Leo Yan wrote:
> > As recommended in section 4.3.7 "Synchronization of register updates" of
> > ARM IHI0064H.b, a self-hosted trace analyzer should always executes an
> > ISB instruction after programming the trace unit registers.
> >
> > An ISB works as a context synchronization event; a DSB is not required.
> > Removes the redundant barrier in the enabling flow.
>
> It is required for MMIO based instances and must be retained.
Sorry I did not give details in commit log so caused confusion (and
thanks a lot for Levi's supplement info!)
I will amend in next spin.
> > The ISB was placed at the end of the enable and disable functions.
> > However, this does not guarantee a context synchronization event in the
> > calling code, which may speculatively execute across function
> > boundaries.
>
> It is not allowed to commit though, right ? I don't think this change
> is required TBH.
Correct, I will drop this part.
Thanks,
Leo
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