Possibility of using Coresight STM - ETR as console for System Control Processor

[Linu Cherian]

Hi,

We are looking for console options( output only) for the SCP(system control processor)cores in our SOC other than UART
and was considering STM as an option.

Something like this,

SCP ----> STM ---> ETR ---> DDR   <--- Linux 

On the Linux system, some user space scripts can retrieve the ETR trace buffers and move it to a file on a periodic basis.

Do you see any basic issue with this approach or have better alternatives to suggest ?

Few issues we could think of, 
1.  SCP wont be able to route the messages to the STM -> ETR path until those are initialized by
the Linux user space. Hence any messages until Linux comes up need to be buffered in the SCP local memory 
and should get flushed once the STM - ETR path is ready.

2. Possible message loss due to buffer overwrite
We might have to reserve the ETR trace buffers only to the SCP and keep sufficiently large buffers to reduce the message loss. 

Assume that reserving a STM port for use by an external core can be achieved from the Linux STM sysfs interface.

Thanks,
Linu Cherian.