[PATCH] arm64: dts: imx8mp: Enable gpu passive throttling

[Martin Kepplinger-Novakovic]

Am Donnerstag, dem 08.05.2025 um 10:18 +0000 schrieb Martin Kepplinger-
Novaković:
> Hook up the gpu as a passive cooling device to the thermal zones'
> alert
> trip point just like the cpu.
> 
> The gpu here consists of 3D GPU, 2D GPU and NPU.
> 
> One way to test would be to set one "alert" trip point low enough
> and watch the cooling device state increase:
> 
> echo 10000 > /sys/class/thermal/thermal_zone0/trip_point_0_temp
> watch cat /sys/class/thermal/cooling_device*/cur_state
> 
> And of course set the trip point back to its original value and watch
> the cooling device states jump to 0 again.
> 
> Signed-off-by: Martin Kepplinger-Novaković <martink at posteo.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 50a07c56faffc..dea9342d071c4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -320,7 +320,10 @@ map0 {
>                                                 <&A53_0
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                 <&A53_1
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                 <&A53_2
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> -                                               <&A53_3
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +                                               <&A53_3
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +                                               <&gpu3d
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +                                               <&gpu2d
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +                                               <&npu
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>                                 };
>                         };
>                 };
> @@ -350,7 +353,10 @@ map0 {
>                                                 <&A53_0
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                 <&A53_1
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
>                                                 <&A53_2
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> -                                               <&A53_3
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +                                               <&A53_3
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +                                               <&gpu3d
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +                                               <&gpu2d
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +                                               <&npu
> THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>                                 };
>                         };
>                 };
> @@ -2229,6 +2235,7 @@ gpu3d: gpu at 38000000 {
>                                  <&clk IMX8MP_CLK_GPU_ROOT>,
>                                  <&clk IMX8MP_CLK_GPU_AHB>;
>                         clock-names = "core", "shader", "bus", "reg";
> +                       #cooling-cells = <2>;
>                         assigned-clocks = <&clk
> IMX8MP_CLK_GPU3D_CORE>,
>                                           <&clk
> IMX8MP_CLK_GPU3D_SHADER_CORE>;
>                         assigned-clock-parents = <&clk
> IMX8MP_SYS_PLL2_1000M>,
> @@ -2245,6 +2252,7 @@ gpu2d: gpu at 38008000 {
>                                  <&clk IMX8MP_CLK_GPU_ROOT>,
>                                  <&clk IMX8MP_CLK_GPU_AHB>;
>                         clock-names = "core", "bus", "reg";
> +                       #cooling-cells = <2>;
>                         assigned-clocks = <&clk
> IMX8MP_CLK_GPU2D_CORE>;
>                         assigned-clock-parents = <&clk
> IMX8MP_SYS_PLL2_1000M>;
>                         assigned-clock-rates = <1000000000>;
> @@ -2302,6 +2310,7 @@ npu: npu at 38500000 {
>                                  <&clk IMX8MP_CLK_ML_AXI>,
>                                  <&clk IMX8MP_CLK_ML_AHB>;
>                         clock-names = "core", "shader", "bus", "reg";
> +                       #cooling-cells = <2>;
>                         power-domains = <&pgc_mlmix>;
>                 };
>  

hi Shawn and all,

Do you have any objections or second thoughts about this?

thank you,

                                  martin