[PATCH v4 01/26] dt-bindings: interrupt-controller: Add Arm GICv5

[Rob Herring (Arm)]

On Tue, 13 May 2025 19:47:54 +0200, Lorenzo Pieralisi wrote:
> The GICv5 interrupt controller architecture is composed of:
> 
> - one or more Interrupt Routing Service (IRS)
> - zero or more Interrupt Translation Service (ITS)
> - zero or more Interrupt Wire Bridge (IWB)
> 
> Describe a GICv5 implementation by specifying a top level node
> corresponding to the GICv5 system component.
> 
> IRS nodes are added as GICv5 system component children.
> 
> An ITS is associated with an IRS so ITS nodes are described
> as IRS children - use the hierarchy explicitly in the device
> tree to define the association.
> 
> IWB nodes are described as a separate schema.
> 
> An IWB is connected to a single ITS, the connection is made explicit
> through the msi-parent property and therefore is not required to be
> explicit through a parent-child relationship in the device tree.
> 
> Signed-off-by: Lorenzo Pieralisi <lpieralisi at kernel.org>
> Cc: Conor Dooley <conor+dt at kernel.org>
> Cc: Rob Herring <robh at kernel.org>
> Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
> Cc: Marc Zyngier <maz at kernel.org>
> ---
>  .../interrupt-controller/arm,gic-v5-iwb.yaml       |  78 ++++++++
>  .../bindings/interrupt-controller/arm,gic-v5.yaml  | 202 +++++++++++++++++++++
>  MAINTAINERS                                        |   7 +
>  3 files changed, 287 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh at kernel.org>