[PATCH v4] arm64: errata: Work around AmpereOne's erratum AC04_CPU_23
Catalin Marinas
catalin.marinas at arm.com
Mon May 19 03:56:51 PDT 2025
On Tue, May 13, 2025 at 11:45:14AM -0700, D Scott Phillips wrote:
> On AmpereOne AC04, updates to HCR_EL2 can rarely corrupt simultaneous
> translations for data addresses initiated by load/store instructions.
> Only instruction initiated translations are vulnerable, not translations
> from prefetches for example. A DSB before the store to HCR_EL2 is
> sufficient to prevent older instructions from hitting the window for
> corruption, and an ISB after is sufficient to prevent younger
> instructions from hitting the window for corruption.
>
> Signed-off-by: D Scott Phillips <scott at os.amperecomputing.com>
> Reviewed-by: Oliver Upton <oliver.upton at linux.dev>
For the core arm64 bits:
Acked-by: Catalin Marinas <catalin.marinas at arm.com>
Marc, Will - any preference on how this should go in (kvm or arm64
trees)?
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