[PATCH v2 0/2] USB PHY support for Exynos990 SoCs
Igor Belwon
igor.belwon at mentallysanemainliners.org
Thu May 15 07:26:48 PDT 2025
On Thu May 15, 2025 at 11:14 AM CEST, Krzysztof Kozlowski wrote:
> On 15/05/2025 10:20, Vinod Koul wrote:
>> On 14-05-25, 16:26, Igor Belwon wrote:
>>> On Wed May 14, 2025 at 10:42 AM CEST, Vinod Koul wrote:
>>>> On 20-04-25, 21:28, Igor Belwon wrote:
>>>>> Hi all!
>>>>>
>>>>> This patchset adds support for the USB 2.0 PHY of the Exynos990 SoC.
>>>>> This SoC has a combo PHY that supports highspeed, superspeed USB and
>>>>> DisplayPort, however due to my inability to test the superspeed part of
>>>>> the combo phy (device always enumerated as high-speed, even on the
>>>>> vendor kernels/bootloaders) only the highspeed part is brought up.
>>>>>
>>>>> These changes have been tested and confirmed working (with the USB_ETH
>>>>> gadget and telnet/ssh in a ramdisk) on a device from the hubble family
>>>>> (x1s) and also a device from the canvas family (c1s).
>>>>
>>>> I am missing the dt patch, can you pls report the whole series if you
>>>> would like me to review and apply this
>>>
>>> Hi Vinod,
>>>
>>> I've sent the DT series a while back (before resending). Usually I
>>> propose DT changes through Krzysztof's tree. The patches are
>>> unchanged (they will be resent unchanged when all usb and wdt
>>> changes are merged).
>>
>> It makes sense to post bindings and driver togther and mostly these go
>> thru subsystem trees!
>>
> I don't think you both speak about the same thing. DT is ambiguous here,
> so always use DTS or DT bindings... that said bindings were here in this
> patchset so if Vinod misses them, this has to be resent.
>
> Best regards,
> Krzysztof
Hi Krzysztof, Vinod.
Krzysztof: Thank you for the clarification. I assumed somehow the
devicetree changes were necessary for the revies. Bad judgment on my part.
Sorry.
Vinod: Sorry for the misunderstanding. I'll resend the patchset shortly.
Regards,
Igor
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