[PATCH] arm64/mm: Disable barrier batching in interrupt contexts

[Will Deacon]

On Wed, May 14, 2025 at 10:29:17AM +0100, Ryan Roberts wrote:
> On 13/05/2025 21:46, Will Deacon wrote:
> > On Mon, May 12, 2025 at 11:22:40AM +0100, Ryan Roberts wrote:
> >> Commit 5fdd05efa1cd ("arm64/mm: Batch barriers when updating kernel
> >> mappings") enabled arm64 kernels to track "lazy mmu mode" using TIF
> >> flags in order to defer barriers until exiting the mode. At the same
> >> time, it added warnings to check that pte manipulations were never
> >> performed in interrupt context, because the tracking implementation
> >> could not deal with nesting.
> >>
> >> But it turns out that some debug features (e.g. KFENCE, DEBUG_PAGEALLOC)
> >> do manipulate ptes in softirq context, which triggered the warnings.
> > 
> > Hmm. Do we also have to worry about the case where a softirq is triggered
> > off the back of a hardirq *and* that hardirq is taken while we're in the
> > middle of e.g. queue_pte_barriers()? In that case, I think we can end
> > up in strange situations, such as having LAZY_MMU_PENDING set when
> > LAZY_MMU is clear, although it looks like things still work even in that
> > case.
> 
> I don't see any problem here. This change ensures that we always behave the
> "old" way in interrupt context. So the interrupt context will never even look at
> those TIF flags, so it doesn't matter that the task context is midway through
> changing the flags when the interrupt comes in.
> 
> (although somehow I feel like I should be bracing for a zinger :)

Ha, for some reason, I was looking at the code _without_ your fix
applied. Although it's quite hard to think about, I couldn't spot any
other issues with nesting beyond the one you call out at the end of the
commit message. Your patch makes all of this a lot simpler, though, so
I'll pick it up (along with the other one).

Thanks,

Will