[PATCH 9/9] arm64: dts: imx8mn-bsh-smm-s2-common: Disable PMIC SNVS reset target state

[Dario Binacchi]

From: Wolfgang Birkner <wolfgang.birkner at bshg.com>

VDD_DRAM was disabled on standby, therefore the reference hardware did not
wake up reliable. Use PMIC reset target state READY instead of SNVS, to
keep VDD_DRAM active during standby.

Signed-off-by: Wolfgang Birkner <wolfgang.birkner at bshg.com>
Signed-off-by: Dario Binacchi <dario.binacchi at amarulasolutions.com>

---

 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
index ea8d741c6904..633874b3bf66 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
@@ -94,7 +94,6 @@ bd71847: pmic at 4b {
 		pinctrl-0 = <&pinctrl_pmic>;
 		interrupt-parent = <&gpio1>;
 		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-		rohm,reset-snvs-powered;
 
 		#clock-cells = <0>;
 		clocks = <&osc_32k>;
-- 
2.43.0