[PATCH v7 4/5] arm64: dts: rockchip: add core dtsi for RK3562 SoC

[Chukun Pan]

Hi,

> I might be blind, but I don't see a tab missing here? #adress-cells and
> #size-cells are in the same level of indentation as the other properties
> of spi0? I did move the -cells down though now.

Sorry I didn't make it clear. This refers to -cells.

> hopefully caught all pwms now

The pinctrl-names of pwm4 to pwm15 are still "active".

> +		saradc0: adc at ff730000 {
> +			compatible = "rockchip,rk3562-saradc";
> +			reg = <0x0 0xff730000 0x0 0x100>;
> +			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> +			#io-channel-cells = <1>;

> > `#io-channel-cells` should be put above `status = "disabled";`
>
> moved now :-)

It looks like saradc0 forgot to change.

Thanks,
Chukun

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2.25.1