[PATCH 1/3] arm64: dts: fvp: Add CPU idle states for Rev C model

Sudeep Holla sudeep.holla at arm.com
Fri May 9 08:29:57 PDT 2025


On Fri, May 09, 2025 at 09:16:54AM -0500, Rob Herring (Arm) wrote:
> 
> On Thu, 08 May 2025 11:32:23 +0100, Sudeep Holla wrote:
> > Add CPU idle state definitions to the FVP Rev C device tree to enable
> > support for CPU lower power modes. This allows the system to properly
> > enter low power states during idle. It is disabled by default as it is
> > know to impact performance on the models.
> > 
> > Note that the power_state parameter(arm,psci-suspend-param) doesn't use
> > the Extended StateID format for compatibility reasons on FVP.
> > 
> > Tested on the FVP Rev C model with PSCI support enabled firmware.
> > 
> > Signed-off-by: Sudeep Holla <sudeep.holla at arm.com>
> > ---
> >  arch/arm64/boot/dts/arm/fvp-base-revc.dts | 32 +++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> > 
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
> 
>   pip3 install dtschema --upgrade
> 
> 
> This patch series was applied (using b4) to base:
>  Base: attempting to guess base-commit...
>  Base: tags/v6.15-rc1-1-g59529bbe642d (exact match)
> 
> If this is not the correct base, please add 'base-commit' tag
> (or use b4 which does this automatically)
> 
> New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/arm/' for 20250508103225.354925-1-sudeep.holla at arm.com:
> 
> arch/arm64/boot/dts/arm/fvp-base-revc.dtb: idle-states: entry-method:0: 'psci' was expected
> 	from schema $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
> arch/arm64/boot/dts/arm/fvp-base-revc.dtb: timer at 2a810000 (arm,armv7-timer-mem): #size-cells: 1 was expected
> 	from schema $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
>

Thanks for the report. Now fixed locally.

-- 
Regards,
Sudeep



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