[PATCH v3] arm64: errata: Work around AmpereOne's erratum AC04_CPU_23
Oliver Upton
oliver.upton at linux.dev
Fri May 9 03:08:05 PDT 2025
Hey D Scott,
On Thu, May 08, 2025 at 02:00:09PM -0700, D Scott Phillips wrote:
> On AmpereOne AC04, updates to HCR_EL2 can rarely corrupt simultaneous
> translations for data addresses initiated by load/store instructions.
> Only instruction initiated translations are vulnerable, not translations
> from prefetches for example. A DSB before the store to HCR_EL2 is
> sufficient to prevent older instructions from hitting the window for
> corruption, and an ISB after is sufficient to prevent younger
> instructions from hitting the window for corruption.
>
> Signed-off-by: D Scott Phillips <scott at os.amperecomputing.com>
Overall looks good, still needs an entry in Documentation/arch/arm64/silicon-errata.rst
which Marc noted in v2.
With that addressed:
Reviewed-by: Oliver Upton <oliver.upton at linux.dev>
Thanks,
Oliver
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