[PATCH v5 1/7] iio: make IIO_DMA_MINALIGN minimum of 8 bytes

[David Lechner]

On 5/8/25 4:39 PM, David Laight wrote:
> On Mon, 05 May 2025 11:31:42 -0500
> David Lechner <dlechner at baylibre.com> wrote:
> 
>> Add a condition to ensure that IIO_DMA_MINALIGN is at least 8 bytes.
>> On some 32-bit architectures, IIO_DMA_MINALIGN is 4. In many cases,
>> drivers are using this alignment for buffers that include a 64-bit
>> timestamp that is used with iio_push_to_buffers_with_ts(), which expects
>> the timestamp to be aligned to 8 bytes. To handle this, we can just make
>> IIO_DMA_MINALIGN at least 8 bytes.
>>
>> Signed-off-by: David Lechner <dlechner at baylibre.com>
>> ---
>>  include/linux/iio/iio.h | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>>
>> diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
>> index 638cf2420fbd85cf2924d09d061df601d1d4bb2a..7e1e3739328d103262071bd34ba5f6631163c122 100644
>> --- a/include/linux/iio/iio.h
>> +++ b/include/linux/iio/iio.h
>> @@ -775,8 +775,18 @@ static inline void *iio_device_get_drvdata(const struct iio_dev *indio_dev)
>>   * to in turn include IIO_DMA_MINALIGN'd elements such as buffers which
>>   * must not share  cachelines with the rest of the structure, thus making
>>   * them safe for use with non-coherent DMA.
>> + *
>> + * A number of drivers also use this on buffers that include a 64-bit timestamp
>> + * that is used with iio_push_to_buffer_with_ts(). Therefore, in the case where
>> + * DMA alignment is not sufficient for proper timestamp alignment, we align to
>> + * 8 bytes instead.
>>   */
>> +#if ARCH_DMA_MINALIGN < sizeof(s64)
>> +#define IIO_DMA_MINALIGN sizeof(s64)
>> +#else
>>  #define IIO_DMA_MINALIGN ARCH_DMA_MINALIGN
>> +#endif
> 
> Did you actually test this?
> You can't use sizeof() in a pre-processor conditional.

Pretty sure I did, but maybe I was asleep at the wheel. Anyway, this got caught
by a build bot and I realized the mistake.

> 
> 	David
> 
>> +
>>  struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv);
>>  
>>  /* The information at the returned address is guaranteed to be cacheline aligned */
>>
>