[PATCH 1/3] arm64: dts: fvp: Add CPU idle states for Rev C model

[Ben Horgan]

Hi,

On 5/8/25 11:32, Sudeep Holla wrote:
> Add CPU idle state definitions to the FVP Rev C device tree to enable
> support for CPU lower power modes. This allows the system to properly
> enter low power states during idle. It is disabled by default as it is
> know to impact performance on the models.
> 
> Note that the power_state parameter(arm,psci-suspend-param) doesn't use
> the Extended StateID format for compatibility reasons on FVP.
> 
> Tested on the FVP Rev C model with PSCI support enabled firmware.
> 
> Signed-off-by: Sudeep Holla <sudeep.holla at arm.com>
> ---
>   arch/arm64/boot/dts/arm/fvp-base-revc.dts | 32 +++++++++++++++++++++++
>   1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> index 9e10d7a6b5a2..ff4e6f4d8797 100644
> --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
> @@ -44,6 +44,30 @@ cpus {
>   		#address-cells = <2>;
>   		#size-cells = <0>;
>   
> +		idle-states {
> +			entry-method = "arm,psci";
> +
> +			CPU_SLEEP_0: cpu-sleep-0 {
> +				compatible = "arm,idle-state";
> +				local-timer-stop;
> +				arm,psci-suspend-param = <0x0010000>;
> +				entry-latency-us = <40>;
> +				exit-latency-us = <100>;
> +				min-residency-us = <150>;
> +				status = "disabled";
> +			};
> +
> +			CLUSTER_SLEEP_0: cluster-sleep-0 {
> +				compatible = "arm,idle-state";
> +				local-timer-stop;
> +				arm,psci-suspend-param = <0x1010000>;
> +				entry-latency-us = <500>;
> +				exit-latency-us = <1000>;
> +				min-residency-us = <2500>;
> +				status = "disabled";
> +			};
> +		};
Do we need a cpu-map so we know which cpus the cluster idle affects?
> +
>   		cpu0: cpu at 0 {
>   			device_type = "cpu";
>   			compatible = "arm,armv8";
> @@ -56,6 +80,7 @@ cpu0: cpu at 0 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C0_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		cpu1: cpu at 100 {
>   			device_type = "cpu";
> @@ -69,6 +94,7 @@ cpu1: cpu at 100 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C0_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		cpu2: cpu at 200 {
>   			device_type = "cpu";
> @@ -82,6 +108,7 @@ cpu2: cpu at 200 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C0_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		cpu3: cpu at 300 {
>   			device_type = "cpu";
> @@ -95,6 +122,7 @@ cpu3: cpu at 300 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C0_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		cpu4: cpu at 10000 {
>   			device_type = "cpu";
> @@ -108,6 +136,7 @@ cpu4: cpu at 10000 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C1_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		cpu5: cpu at 10100 {
>   			device_type = "cpu";
> @@ -121,6 +150,7 @@ cpu5: cpu at 10100 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C1_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		cpu6: cpu at 10200 {
>   			device_type = "cpu";
> @@ -134,6 +164,7 @@ cpu6: cpu at 10200 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C1_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		cpu7: cpu at 10300 {
>   			device_type = "cpu";
> @@ -147,6 +178,7 @@ cpu7: cpu at 10300 {
>   			d-cache-line-size = <64>;
>   			d-cache-sets = <256>;
>   			next-level-cache = <&C1_L2>;
> +			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
>   		};
>   		C0_L2: l2-cache0 {
>   			compatible = "cache";

-- 
Thanks,

Ben