[PATCH] arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays

[Catalin Marinas]

On Thu, 01 May 2025 11:47:47 +0100, Will Deacon wrote:
> Commit a5951389e58d ("arm64: errata: Add newer ARM cores to the
> spectre_bhb_loop_affected() lists") added some additional CPUs to the
> Spectre-BHB workaround, including some new arrays for designs that
> require new 'k' values for the workaround to be effective.
> 
> Unfortunately, the new arrays omitted the sentinel entry and so
> is_midr_in_range_list() will walk off the end when it doesn't find a
> match. With UBSAN enabled, this leads to a crash during boot when
> is_midr_in_range_list() is inlined (which was more common prior to
> c8c2647e69be ("arm64: Make  _midr_in_range_list() an exported
> function")):
> 
> [...]

Applied to arm64 (for-next/fixes), thanks!

[1/1] arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays
      https://git.kernel.org/arm64/c/fee4d171451c

-- 
Catalin