[PATCH v2 1/4] dt-bindings: net: Add MTIP L2 switch description

[Andrew Lunn]

> +                ethphy0: ethernet-phy at 0 {
> +                        reg = <0>;
> +                        smsc,disable-energy-detect;
> +                        /* Both PHYs (i.e. 0,1) have the same, single GPIO, */
> +                        /* line to handle both, their interrupts (AND'ed) */
> +                        interrupt-parent = <&gpio4>;
> +                        interrupts = <13 IRQ_TYPE_EDGE_FALLING>;

Shared interrupts cannot be edge. They are level, so that either can
hold the interrupt active until it is cleared.

Also, PHY interrupts in general are level, because there are multiple
interrupt sources within the PHY, and you need to clear them all
before the interrupt is released.

	Andrew