[PATCH v2] usb: dwc3: xilinx: Prevent spike in reset signal

[Thinh Nguyen]

On Tue, Mar 18, 2025, Mike Looijmans wrote:
> The "reset" GPIO controls the RESET signal to an external, usually
> ULPI PHY, chip. The original code path acquires the signal in LOW
> state, and then immediately asserts it HIGH again, if the reset
> signal defaulted to asserted, there'd be a short "spike" before the
> reset.
> 
> Here is what happens depending on the pre-existing state of the reset
> signal:
> Reset (previously asserted):   ~~~|_|~~~~|_______
> Reset (previously deasserted): _____|~~~~|_______
>                                   ^ ^    ^
>                                   A B    C
> 
> At point A, the low going transition is because the reset line is
> requested using GPIOD_OUT_LOW. If the line is successfully requested,
> the first thing we do is set it high _without_ any delay. This is
> point B. So, a glitch occurs between A and B.
> 
> Requesting the line using GPIOD_OUT_HIGH eliminates the A and B
> transitions. Instead we get:
> 
> Reset (previously asserted)  : ~~~~~~~~~~|______
> Reset (previously deasserted): ____|~~~~~|______
>                                    ^     ^
>                                    A     C
> 
> Where A and C are the points described above in the code. Point B
> has been eliminated.
> 
> The issue was found during code inspection.
> 
> Also remove the cryptic "toggle ulpi .." comment.
> 
> Fixes: ca05b38252d7 ("usb: dwc3: xilinx: Add gpio-reset support")

May want to add stable tag also?

> Signed-off-by: Mike Looijmans <mike.looijmans at topic.nl>
> ---
> 
> Changes in v2:
> Add "Fixes" tag
> Remove "toggle ulpi" comment
> Extend comment to explain what is happening in detail
> 
>  drivers/usb/dwc3/dwc3-xilinx.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 

In any case,

Acked-by: Thinh Nguyen <Thinh.Nguyen at synopsys.com>

Thanks,
Thinh