[PATCH v4 13/14] clk: sunxi-ng: a523: add reset lines
Jernej Škrabec
jernej.skrabec at gmail.com
Sat Mar 8 23:00:20 PST 2025
Dne petek, 7. marec 2025 ob 01:26:27 Srednjeevropski standardni čas je Andre Przywara napisal(a):
> Allwinner SoCs do not contain a separate reset controller, instead the
> reset lines for the various devices are integrated into the "BGR" (Bus
> Gate / Reset) registers, for each device group: one for all UARTs, one
> for all SPI interfaces, and so on.
> The Allwinner CCU driver also doubles as a reset provider, and since the
> reset lines are indeed just single bits in those BGR register, we can
> represent them easily in an array of structs, just containing the
> register offset and the bit number.
>
> Add the location of the reset bits for all devices in the A523/T527
> SoCs, using the existing sunxi CCU infrastructure.
>
> Signed-off-by: Andre Przywara <andre.przywara at arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec at gmail.com>
Best regards,
Jernej
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