[PATCH 2/2] dmaengine: Add Arm DMA-350 driver
kernel test robot
lkp at intel.com
Thu Mar 6 03:33:28 PST 2025
Hi Robin,
kernel test robot noticed the following build warnings:
[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on linus/master v6.14-rc5 next-20250305]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Robin-Murphy/dt-bindings-dma-Add-Arm-DMA-350/20250301-012733
base: https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
patch link: https://lore.kernel.org/r/55e084dd2b5720bdddf503ffac560d111032aa96.1740762136.git.robin.murphy%40arm.com
patch subject: [PATCH 2/2] dmaengine: Add Arm DMA-350 driver
config: nios2-randconfig-r111-20250306 (https://download.01.org/0day-ci/archive/20250306/202503061910.eJW7M2H3-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 14.2.0
reproduce: (https://download.01.org/0day-ci/archive/20250306/202503061910.eJW7M2H3-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503061910.eJW7M2H3-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
>> drivers/dma/arm-dma350.c:485:31: sparse: sparse: dubious: !x & y
drivers/dma/arm-dma350.c: note: in included file (through include/linux/smp.h, include/linux/lockdep.h, include/linux/spinlock.h, ...):
include/linux/list.h:83:21: sparse: sparse: self-comparison always evaluates to true
include/linux/list.h:83:21: sparse: sparse: self-comparison always evaluates to true
include/linux/list.h:83:21: sparse: sparse: self-comparison always evaluates to true
include/linux/list.h:83:21: sparse: sparse: self-comparison always evaluates to true
vim +485 drivers/dma/arm-dma350.c
462
463 static irqreturn_t d350_irq(int irq, void *data)
464 {
465 struct d350_chan *dch = data;
466 struct device *dev = dch->vc.chan.device->dev;
467 struct virt_dma_desc *vd = &dch->desc->vd;
468 u32 ch_status;
469
470 ch_status = readl(dch->base + CH_STATUS);
471 if (!ch_status)
472 return IRQ_NONE;
473
474 if (ch_status & CH_STAT_INTR_ERR) {
475 u32 errinfo = readl_relaxed(dch->base + CH_ERRINFO);
476
477 if (errinfo & (CH_ERRINFO_AXIRDPOISERR | CH_ERRINFO_AXIRDRESPERR))
478 vd->tx_result.result = DMA_TRANS_READ_FAILED;
479 else if (errinfo & CH_ERRINFO_AXIWRRESPERR)
480 vd->tx_result.result = DMA_TRANS_WRITE_FAILED;
481 else
482 vd->tx_result.result = DMA_TRANS_ABORTED;
483
484 vd->tx_result.residue = d350_get_residue(dch);
> 485 } else if (!ch_status & CH_STAT_INTR_DONE) {
486 dev_warn(dev, "Unexpected IRQ source? 0x%08x\n", ch_status);
487 }
488 writel_relaxed(ch_status, dch->base + CH_STATUS);
489
490 spin_lock(&dch->vc.lock);
491 vchan_cookie_complete(vd);
492 if (ch_status & CH_STAT_INTR_DONE) {
493 dch->status = DMA_COMPLETE;
494 dch->residue = 0;
495 d350_start_next(dch);
496 } else {
497 dch->status = DMA_ERROR;
498 dch->residue = vd->tx_result.residue;
499 }
500 spin_unlock(&dch->vc.lock);
501
502 return IRQ_HANDLED;
503 }
504
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