[PATCH v2] mailbox: mtk-cmdq: Refine GCE_GCTL_VALUE setting

[AngeloGioacchino Del Regno]

Il 24/02/25 11:50, Jason-JH Lin ha scritto:
> Add cmdq_gctl_value_toggle() to configure GCE_CTRL_BY_SW and GCE_DDR_EN
> together in the same GCE_GCTL_VALUE register.
> 
> For the SoCs whose GCE is located in MMINFRA and uses MMINFRA_AO power,
> this allows it to be written without enabling the clocks. Otherwise, all
> GCE registers should be written after the GCE clocks are enabled.
> Move this function into cmdq_runtime_resume() and cmdq_runtime_suspend()
> to ensure it is called when the GCE clock is enabled.
> 
> Fixes: 7abd037aa581 ("mailbox: mtk-cmdq: add gce ddr enable support flow")
> Signed-off-by: Jason-JH Lin <jason-jh.lin at mediatek.com>

I have erroneously picked this patch in the MediaTek tree, as I had misread the
changed file, thought that it was mtk-cmdq-helper.c.

This patch also has the wrong recipients, as this should not go through the
MediaTek trees, but through the mailbox one.

Therefore, I dropped this patch from the MediaTek tree - sorry for the confusion.

Regards,
Angelo