[PATCH v10 07/17] media: mali-c55: Add Mali-C55 ISP driver

Dan Scally dan.scally at ideasonboard.com
Mon Jun 30 03:16:33 PDT 2025


Hello Laurent, Sakari

On 30/06/2025 09:35, Laurent Pinchart wrote:
> On Mon, Jun 30, 2025 at 10:37:47AM +0300, Sakari Ailus wrote:
>> On Sun, Jun 29, 2025 at 09:35:47PM +0300, Laurent Pinchart wrote:
>>> On Sat, Jun 28, 2025 at 11:06:54PM +0300, Sakari Ailus wrote:
>>>> On 6/24/25 13:21, Daniel Scally wrote:
>>> [snip]
>>>
>>>>> diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-isp.c b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c
>>>>> new file mode 100644
>>>>> index 0000000000000000000000000000000000000000..20d4d16c75fbf0d5519ecadb5ed1d080bdae05de
>>>>> --- /dev/null
>>>>> +++ b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c
>>>>> @@ -0,0 +1,656 @@
>>>>> +// SPDX-License-Identifier: GPL-2.0
>>>>> +/*
>>>>> + * ARM Mali-C55 ISP Driver - Image signal processor
>>>>> + *
>>>>> + * Copyright (C) 2024 Ideas on Board Oy
>>>> It's 2025 already.
>>>>
>>>>> + */
>>>>> +
>>>>> +#include <linux/delay.h>
>>>>> +#include <linux/iopoll.h>
>>>>> +#include <linux/property.h>
>>>>> +#include <linux/string.h>
>>>>> +
>>>>> +#include <linux/media/arm/mali-c55-config.h>
>>>> If this is a UAPI header, please include uapi in the path, too.
>>>>
>>>> Earlier such headers have been under include/uapi/linux, I don't object
>>>> putting new ones elsewhere in principle though. Just check with Hans and
>>>> Laurent, too... I don't have an opinion yet really.
>>> With each new media header we add to include/uapi/linux/, I wish
>>> stronger and stronger that we had created include/uapi/linux/media/. We
>>> don't have to do it now, my regret will just grow stronger :-)
>> I'm fine with using include/uapi/linux/media/.

We have include/uapi/linux/media: 
https://elixir.bootlin.com/linux/v6.15.4/source/include/uapi/linux/media. The patch adding the 
header in this series puts it into a new "arm" subfolder there.

>>
>>>>> +/* NOT const because the default needs to be filled in at runtime */
>>>>> +static struct v4l2_ctrl_config mali_c55_isp_v4l2_custom_ctrls[] = {
>>>>> +	{
>>>>> +		.ops = &mali_c55_isp_ctrl_ops,
>>>>> +		.id = V4L2_CID_MALI_C55_CAPABILITIES,
>>>>> +		.name = "Mali-C55 ISP Capabilities",
>>>>> +		.type = V4L2_CTRL_TYPE_BITMASK,
>>>>> +		.min = 0,
>>>>> +		.max = MALI_C55_GPS_PONG_FITTED |
>>>>> +		       MALI_C55_GPS_WDR_FITTED |
>>>>> +		       MALI_C55_GPS_COMPRESSION_FITTED |
>>>>> +		       MALI_C55_GPS_TEMPER_FITTED |
>>>>> +		       MALI_C55_GPS_SINTER_LITE_FITTED |
>>>>> +		       MALI_C55_GPS_SINTER_FITTED |
>>>>> +		       MALI_C55_GPS_IRIDIX_LTM_FITTED |
>>>>> +		       MALI_C55_GPS_IRIDIX_GTM_FITTED |
>>>>> +		       MALI_C55_GPS_CNR_FITTED |
>>>>> +		       MALI_C55_GPS_FRSCALER_FITTED |
>>>>> +		       MALI_C55_GPS_DS_PIPE_FITTED,
>>>>> +		.def = 0,
>>>>> +	},
>>>>> +};
>>>>> +
>>>>> +static int mali_c55_isp_init_controls(struct mali_c55 *mali_c55)
>>>>> +{
>>>>> +	struct v4l2_ctrl_handler *handler = &mali_c55->isp.handler;
>>>>> +	struct v4l2_ctrl *capabilities;
>>>>> +	int ret;
>>>>> +
>>>>> +	ret = v4l2_ctrl_handler_init(handler, 1);
>>>>> +	if (ret)
>>>>> +		return ret;
>>>>> +
>>>>> +	mali_c55_isp_v4l2_custom_ctrls[0].def = mali_c55->capabilities;
>>>> The capabilities here are still specific to a device, not global, in
>>>> principle at least. Can you move it here, as a local variable?
>>>>
>>>>> +
>>>>> +	capabilities = v4l2_ctrl_new_custom(handler,
>>>>> +					    &mali_c55_isp_v4l2_custom_ctrls[0],
>>>>> +					    NULL);
>>>>> +	if (capabilities)
>>>>> +		capabilities->flags |= V4L2_CTRL_FLAG_READ_ONLY;
>>>>> +
>>>>> +	if (handler->error) {
>>>>> +		dev_err(mali_c55->dev, "failed to register capabilities control\n");
>>>>> +		v4l2_ctrl_handler_free(handler);
>>>>> +		return handler->error;
>>>> v4l2_ctrl_handler_free() will return the error soon, presumably sooner
>>>> than the above code makes it to upstream. Before that, this pattern
>>>> won't work as v4l2_ctrl_handler_free() also resets the handler's error
>>>> field. :-)
>>>>
>>>>> diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-registers.h b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h
>>>>> new file mode 100644
>>>>> index 0000000000000000000000000000000000000000..36a81be0191a15da91809dd2da5d279716f6d725
>>>>> --- /dev/null
>>>>> +++ b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h
>>>>> @@ -0,0 +1,318 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>>>> +/*
>>>>> + * ARM Mali-C55 ISP Driver - Register definitions
>>>>> + *
>>>>> + * Copyright (C) 2024 Ideas on Board Oy
>>>>> + */
>>>>> +
>>>>> +#ifndef _MALI_C55_REGISTERS_H
>>>>> +#define _MALI_C55_REGISTERS_H
>>>>> +
>>>>> +#include <linux/bits.h>
>>>>> +
>>>>> +/* ISP Common 0x00000 - 0x000ff */
>>>>> +
>>>>> +#define MALI_C55_REG_API				0x00000
>>>>> +#define MALI_C55_REG_PRODUCT				0x00004
>>>>> +#define MALI_C55_REG_VERSION				0x00008
>>>>> +#define MALI_C55_REG_REVISION				0x0000c
>>>>> +#define MALI_C55_REG_PULSE_MODE				0x0003c
>>>>> +#define MALI_C55_REG_INPUT_MODE_REQUEST			0x0009c
>>>>> +#define MALI_C55_INPUT_SAFE_STOP			0x00
>>>>> +#define MALI_C55_INPUT_SAFE_START			0x01
>>>>> +#define MALI_C55_REG_MODE_STATUS			0x000a0
>>>>> +#define MALI_C55_REG_INTERRUPT_MASK_VECTOR		0x00030
>>>>> +#define MALI_C55_INTERRUPT_MASK_ALL			GENMASK(31, 0)
>>>>> +
>>>>> +#define MALI_C55_REG_GLOBAL_MONITOR			0x00050
>>>>> +
>>>>> +#define MALI_C55_REG_GEN_VIDEO				0x00080
>>>>> +#define MALI_C55_REG_GEN_VIDEO_ON_MASK			BIT(0)
>>>>> +#define MALI_C55_REG_GEN_VIDEO_MULTI_MASK		BIT(1)
>>>>> +#define MALI_C55_REG_GEN_PREFETCH_MASK			GENMASK(31, 16)
>>>>> +
>>>>> +#define MALI_C55_REG_MCU_CONFIG				0x00020
>>>>> +#define MALI_C55_REG_MCU_CONFIG_OVERRIDE_MASK		BIT(0)
>>>>> +#define MALI_C55_REG_MCU_CONFIG_WRITE_MASK		BIT(1)
>>>>> +#define MALI_C55_MCU_CONFIG_WRITE(x)			((x) << 1)
>>>> Is x unsigned?
>>> Does it matter ? The reason why the BIT() macro uses (UL(1) << (nr))
>>> instead of (1 << (nr)) is (if I'm not mistaken) to avoid incorrect
>>> handling of bit 31. As long as x doesn't take negative values and
>>> doesn't extend to bit 31, it should be fine.
>> For that reason exactly. If you're unsure, maybe at least cast it as
>> unsigned?
> The MCU_CONFIG_WRITE field is on bit long, so there's no practical
> issue. I also don't expect the driver to pass a negative value. We could
> still add an unsigned cast if there's a general rule that all register
> fields must be cast to unsigned. This isn't done in the vast majority of
> drivers though.
>
>>>>> +#define MALI_C55_REG_MCU_CONFIG_WRITE_PING		BIT(1)
>>>>> +#define MALI_C55_REG_MCU_CONFIG_WRITE_PONG		0x00
>>>>> +#define MALI_C55_REG_MULTI_CONTEXT_MODE_MASK		BIT(8)
>>>>> +#define MALI_C55_REG_PING_PONG_READ			0x00024
>>>>> +#define MALI_C55_REG_PING_PONG_READ_MASK		BIT(2)
>>>>> +#define MALI_C55_INTERRUPT_BIT(x)			BIT(x)
>>>>> +
>>>>> +#define MALI_C55_REG_GLOBAL_PARAMETER_STATUS		0x00068
>>>>> +#define MALI_C55_GPS_PONG_FITTED			BIT(0)
>>>>> +#define MALI_C55_GPS_WDR_FITTED				BIT(1)
>>>>> +#define MALI_C55_GPS_COMPRESSION_FITTED			BIT(2)
>>>>> +#define MALI_C55_GPS_TEMPER_FITTED			BIT(3)
>>>>> +#define MALI_C55_GPS_SINTER_LITE_FITTED			BIT(4)
>>>>> +#define MALI_C55_GPS_SINTER_FITTED			BIT(5)
>>>>> +#define MALI_C55_GPS_IRIDIX_LTM_FITTED			BIT(6)
>>>>> +#define MALI_C55_GPS_IRIDIX_GTM_FITTED			BIT(7)
>>>>> +#define MALI_C55_GPS_CNR_FITTED				BIT(8)
>>>>> +#define MALI_C55_GPS_FRSCALER_FITTED			BIT(9)
>>>>> +#define MALI_C55_GPS_DS_PIPE_FITTED			BIT(10)
>>>>> +
>>>>> +#define MALI_C55_REG_BLANKING				0x00084
>>>>> +#define MALI_C55_REG_HBLANK_MASK			GENMASK(15, 0)
>>>>> +#define MALI_C55_REG_VBLANK_MASK			GENMASK(31, 16)
>>>>> +#define MALI_C55_VBLANK(x)				((x) << 16)
>>>> Same question for the bit shifts left elsewhere in the header.
>>>>
>>>>> +
>>>>> +#define MALI_C55_REG_HC_START				0x00088
>>>>> +#define MALI_C55_HC_START(h)				(((h) & 0xffff) << 16)
>>>>> +#define MALI_C55_REG_HC_SIZE				0x0008c
>>>>> +#define MALI_C55_HC_SIZE(h)				((h) & 0xffff)
>>>>> +#define MALI_C55_REG_VC_START_SIZE			0x00094
>>>>> +#define MALI_C55_VC_START(v)				((v) & 0xffff)
>>>>> +#define MALI_C55_VC_SIZE(v)				(((v) & 0xffff) << 16)
>>>>> +
>>>>> +/* Ping/Pong Configuration Space */
>>>>> +#define MALI_C55_REG_BASE_ADDR				0x18e88
>>>>> +#define MALI_C55_REG_BYPASS_0				0x18eac
>>>>> +#define MALI_C55_REG_BYPASS_0_VIDEO_TEST		BIT(0)
>>>>> +#define MALI_C55_REG_BYPASS_0_INPUT_FMT			BIT(1)
>>>>> +#define MALI_C55_REG_BYPASS_0_DECOMPANDER		BIT(2)
>>>>> +#define MALI_C55_REG_BYPASS_0_SENSOR_OFFSET_WDR		BIT(3)
>>>>> +#define MALI_C55_REG_BYPASS_0_GAIN_WDR			BIT(4)
>>>>> +#define MALI_C55_REG_BYPASS_0_FRAME_STITCH		BIT(5)
>>>>> +#define MALI_C55_REG_BYPASS_1				0x18eb0
>>>>> +#define MALI_C55_REG_BYPASS_1_DIGI_GAIN			BIT(0)
>>>>> +#define MALI_C55_REG_BYPASS_1_FE_SENSOR_OFFS		BIT(1)
>>>>> +#define MALI_C55_REG_BYPASS_1_FE_SQRT			BIT(2)
>>>>> +#define MALI_C55_REG_BYPASS_1_RAW_FE			BIT(3)
>>>>> +#define MALI_C55_REG_BYPASS_2				0x18eb8
>>>>> +#define MALI_C55_REG_BYPASS_2_SINTER			BIT(0)
>>>>> +#define MALI_C55_REG_BYPASS_2_TEMPER			BIT(1)
>>>>> +#define MALI_C55_REG_BYPASS_3				0x18ebc
>>>>> +#define MALI_C55_REG_BYPASS_3_SQUARE_BE			BIT(0)
>>>>> +#define MALI_C55_REG_BYPASS_3_SENSOR_OFFSET_PRE_SH	BIT(1)
>>>>> +#define MALI_C55_REG_BYPASS_3_MESH_SHADING		BIT(3)
>>>>> +#define MALI_C55_REG_BYPASS_3_WHITE_BALANCE		BIT(4)
>>>>> +#define MALI_C55_REG_BYPASS_3_IRIDIX			BIT(5)
>>>>> +#define MALI_C55_REG_BYPASS_3_IRIDIX_GAIN		BIT(6)
>>>>> +#define MALI_C55_REG_BYPASS_4				0x18ec0
>>>>> +#define MALI_C55_REG_BYPASS_4_DEMOSAIC_RGB		BIT(1)
>>>>> +#define MALI_C55_REG_BYPASS_4_PF_CORRECTION		BIT(3)
>>>>> +#define MALI_C55_REG_BYPASS_4_CCM			BIT(4)
>>>>> +#define MALI_C55_REG_BYPASS_4_CNR			BIT(5)
>>>>> +#define MALI_C55_REG_FR_BYPASS				0x18ec4
>>>>> +#define MALI_C55_REG_DS_BYPASS				0x18ec8
>>>>> +#define MALI_C55_BYPASS_CROP				BIT(0)
>>>>> +#define MALI_C55_BYPASS_SCALER				BIT(1)
>>>>> +#define MALI_C55_BYPASS_GAMMA_RGB			BIT(2)
>>>>> +#define MALI_C55_BYPASS_SHARPEN				BIT(3)
>>>>> +#define MALI_C55_BYPASS_CS_CONV				BIT(4)
>>>>> +#define MALI_C55_REG_ISP_RAW_BYPASS			0x18ecc
>>>>> +#define MALI_C55_ISP_RAW_BYPASS_BYPASS_MASK		BIT(0)
>>>>> +#define MALI_C55_ISP_RAW_BYPASS_FR_BYPASS_MASK		GENMASK(9, 8)
>>>>> +#define MALI_C55_ISP_RAW_BYPASS_RAW_FR_BYPASS		(2 << 8)
>>>>> +#define MALI_C55_ISP_RAW_BYPASS_RGB_FR_BYPASS		(1 << 8)
>>>> BIT() or make these unsigned.
>>> It's a 2 bits field, BIT() isn't appropriate.
>> That leaves us with the other alternative, doesn't it?
> Absolutely, although unsigned is unnecessary in this case as we're not
> approaching bit 31.
>



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