[PATCH v12 1/7] dt-bindings: serial: Added secondary clock for RZ/T2H RSCI
Rob Herring
robh at kernel.org
Thu Jun 26 16:09:13 PDT 2025
On Tue, Jun 17, 2025 at 02:44:58PM +0100, Prabhakar wrote:
> From: Thierry Bultel <thierry.bultel.yh at bp.renesas.com>
>
> At boot, the default clock is the PCLKM core clock (synchronous
> clock, which is enabled by the bootloader).
> For different baudrates, the asynchronous clock input must be used.
> Clock selection is made by an internal register of RCSI.
>
> Add the optional "sck", external clock input.
>
> Also remove the unneeded serial0 alias from the dts example.
>
> Signed-off-by: Thierry Bultel <thierry.bultel.yh at bp.renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas at glider.be>
> ---
> Hi Rob,
> As mentioned in the thread [1] below there are no users of the RSCI binding
> hence this change doesn not break any ABI.
>
> [1] https://lore.kernel.org/all/CAMuHMdUThuWxxznhjvcn5cOFCWOkb5u-fRYwTOoenDRY=4H6FA@mail.gmail.com/
Please state this in the commit message. If you want to break the ABI
you have to say that you are and why it is okay.
>
> Cheers, Prabhakar
> ---
> .../bindings/serial/renesas,rsci.yaml | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> index ea879db5f485..1bf255407df0 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> @@ -35,10 +35,15 @@ properties:
> - const: tei
>
> clocks:
> - maxItems: 1
> + minItems: 2
> + maxItems: 3
>
> clock-names:
> - const: fck # UART functional clock
> + minItems: 2
> + items:
> + - const: operation
> + - const: bus
> + - const: sck # optional external clock input
>
> power-domains:
> maxItems: 1
> @@ -60,10 +65,6 @@ examples:
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/renesas-cpg-mssr.h>
>
> - aliases {
> - serial0 = &sci0;
> - };
> -
> sci0: serial at 80005000 {
> compatible = "renesas,r9a09g077-rsci";
> reg = <0x80005000 0x400>;
> @@ -72,7 +73,7 @@ examples:
> <GIC_SPI 592 IRQ_TYPE_EDGE_RISING>,
> <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "eri", "rxi", "txi", "tei";
> - clocks = <&cpg CPG_MOD 108>;
> - clock-names = "fck";
> + clocks = <&cpg CPG_MOD 8>, <&cpg CPG_CORE 13>;
> + clock-names = "operation", "bus";
> power-domains = <&cpg>;
> };
> --
> 2.49.0
>
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