[PATCH] arm64: dts: renesas: r8a779g3: Update thermal trip points on V4H Sparrow Hawk
Niklas Söderlund
niklas.soderlund at ragnatech.se
Thu Jun 26 14:41:52 PDT 2025
Hi Marek,
Thanks for your work.
On 2025-06-25 12:01:56 +0200, Marek Vasut wrote:
> Since the Sparrow Hawk has a smaller PCB than the White Hawk, it tends
> to generate more heat. To prevent potential damage to the board, adjust
> the temperature trip points.
>
> Add four "passive" trip points which increasingly throttle the CPU to
> prevent overheating. The first trip point at 68°C disables the 1.8 GHz
> and 1.7 GHz modes and limits the CPU to 1.5 GHz frequency. The second
> trip point at 72°C disables the 1.5 GHz mode and limits the CPU to 1.0
> GHz frequency. The third trip point at 76°C uses thermal-idle to start
> inserting idle cycles into the CPU instruction stream to cool the CPU
> cores down. The fourth and last trip point at 80°C disables the 1.0 GHz
> mode and limits the CPU to 500 MHz frequency.
>
> In case the SoC heats up further, in case either of the thermal sensors
> readings passes the 100°C, a thermal shutdown is triggered to prevent
> any damage to the hardware.
>
> Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
> ---
> Cc: Conor Dooley <conor+dt at kernel.org>
> Cc: Geert Uytterhoeven <geert+renesas at glider.be>
> Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
> Cc: Magnus Damm <magnus.damm at gmail.com>
> Cc: "Niklas Söderlund" <niklas.soderlund at ragnatech.se>
> Cc: Rob Herring <robh at kernel.org>
> Cc: devicetree at vger.kernel.org
> Cc: linux-renesas-soc at vger.kernel.org
> ---
> .../dts/renesas/r8a779g3-sparrow-hawk.dts | 137 ++++++++++++++++++
> 1 file changed, 137 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts
> index 9ba23129e65e..ba81df3c779d 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts
> @@ -38,6 +38,7 @@
>
> /dts-v1/;
> #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> #include "r8a779g3.dtsi"
>
> @@ -797,3 +798,139 @@ &rwdt {
> &scif_clk { /* X12 */
> clock-frequency = <24000000>;
> };
> +
> +/* thermal-idle cooling for all SoC cores */
> +&a76_0 {
> + #cooling-cells = <2>;
> +
> + a76_0_thermal_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <10000>;
> + exit-latency-us = <500>;
> + };
> +};
> +
> +&a76_1 {
> + a76_1_thermal_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <10000>;
> + exit-latency-us = <500>;
> + };
> +};
> +
> +&a76_2 {
> + a76_2_thermal_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <10000>;
> + exit-latency-us = <500>;
> + };
> +};
> +
> +&a76_3 {
> + a76_3_thermal_idle: thermal-idle {
> + #cooling-cells = <2>;
> + duration-us = <10000>;
> + exit-latency-us = <500>;
> + };
> +};
I did not know you could do this and use it as a cooling device, thanks
for teaching me something new!
> +
> +/* THS sensors in SoC, critical temperature trip point is 100C */
> +&sensor1_crit {
> + temperature = <100000>;
> +};
> +
> +&sensor2_crit {
> + temperature = <100000>;
> +};
> +
> +&sensor3_crit {
> + temperature = <100000>;
> +};
> +
> +&sensor4_crit {
> + temperature = <100000>;
> +};
> +
> +&sensor_thermal_cr52 {
> + critical-action = "shutdown";
> +};
> +
> +&sensor_thermal_cnn {
> + critical-action = "shutdown";
> +};
Is this not the default action for critical trip points? In my testing
in the past R-Car systems have always shutdown when the critical trip is
reached. If it's not I think we should move these to r8a779g0.dtsi. And
likely add them for all other SoCs too?
> +
> +/* THS sensor in SoC near CA76 cores does more progressive cooling. */
> +&sensor_thermal_ca76 {
> + critical-action = "shutdown";
> +
> + cooling-maps {
> + /*
> + * The cooling-device minimum and maximum parameters inversely
> + * match opp-table-0 {} node entries in r8a779g0.dtsi, in other
> + * words, 0 refers to 1.8 GHz OPP and 4 refers to 500 MHz OPP.
> + * This is because they refer to cooling levels, where maximum
> + * cooling level happens at 500 MHz OPP, when the CPU core is
> + * running slowly and therefore generates least heat.
> + */
> + map0 {
> + /* At 68C, inhibit 1.7 GHz and 1.8 GHz modes */
> + trip = <&sensor3_passive_low>;
> + cooling-device = <&a76_0 2 4>;
> + contribution = <128>;
> + };
> +
> + map1 {
> + /* At 72C, inhibit 1.5 GHz mode */
> + trip = <&sensor3_passive_mid>;
> + cooling-device = <&a76_0 3 4>;
> + contribution = <256>;
> + };
> +
> + map2 {
> + /* At 76C, start injecting idle states */
> + trip = <&sensor3_passive_hi>;
> + cooling-device = <&a76_0_thermal_idle 0 80>,
> + <&a76_1_thermal_idle 0 80>,
> + <&a76_2_thermal_idle 0 80>,
> + <&a76_3_thermal_idle 0 80>;
> + contribution = <512>;
> + };
> +
> + map3 {
> + /* At 80C, inhibit 1.0 GHz mode */
> + trip = <&sensor3_passive_crit>;
> + cooling-device = <&a76_0 4 4>;
> + contribution = <1024>;
> + };
> + };
> +
> + trips {
> + sensor3_passive_low: sensor3-passive-low {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + sensor3_passive_mid: sensor3-passive-mid {
> + temperature = <72000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + sensor3_passive_hi: sensor3-passive-hi {
> + temperature = <76000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + sensor3_passive_crit: sensor3-passive-crit {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + };
> +};
> +
> +&sensor_thermal_ddr1 {
> + critical-action = "shutdown";
> +};
> --
> 2.47.2
>
--
Kind Regards,
Niklas Söderlund
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