[PATCH] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi()

Marc Zyngier maz at kernel.org
Thu Jun 26 00:52:50 PDT 2025


On Wed, 25 Jun 2025 16:47:09 +0800, Wei-Lin Chang wrote:
> The state of the vcpu's MI line should be asserted when its
> ICH_HCR_EL2.En is set and ICH_MISR_EL2 is non-zero. Using bitwise AND
> (&=) directly for this calculation will not give us the correct result
> when the LSB of the vcpu's ICH_MISR_EL2 isn't set. Correct this by first
> adjusting the return value of vgic_v3_get_misr() into 1 if it is
> non-zero.
> 
> [...]

Applied to fixes, thanks!

[1/1] KVM: arm64: nv: Fix MI line level calculation in vgic_v3_nested_update_mi()
      commit: af040a9a296044fd4b748786c2516f172a7617f1

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.





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