[PATCH v3 5/7] arm64: dts: axiado: Add initial support for AX3000 SoC and eval board

[Harshit Shah]

Thank you for the reviews. I have some questions/feedback to clarify 
before I fix some of them.

On 6/23/2025 11:45 PM, Krzysztof Kozlowski wrote:
>
> On 23/06/2025 19:28, Harshit Shah wrote:
>> +                     clocks = <&refclk>;
>> +                     interrupt-parent = <&gic500>;
>> +                     interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
>> +                     gpio-controller;
>> +                     #gpio-cells = <2>;
>> +                     interrupt-controller;
>> +                     #interrupt-cells = <2>;
>> +                     status = "disabled";
>> +             };
> Please follow DTS coding style.

Sorry, I didn't got this comment. Is this for the spaces between the 
nodes or something else?

The current GPIO node is as follows:

gpio0: gpio-controller at 80500000 {
                         compatible = "cdns,gpio-r1p02";
                         reg = <0x00 0x80500000 0x00 0x400>;
                         clocks = <&refclk>;
                         interrupt-parent = <&gic500>;
                         interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
                         #interrupt-cells = <2>;
                         status = "disabled";
                 };

I checked the document: 
https://elixir.bootlin.com/linux/v6.15/source/Documentation/devicetree/bindings/dts-coding-style.rst#L112.

>
>> +             gpio1: gpio-controller at 80580000 {
>> +                     compatible = "cdns,gpio-r1p02";
> This should not be accepted without specific compatible, but that's some
> old binding so maybe matters less. Anyway, if you ever need quirk or
> custom properties they I will reject them based on what you claim here.

Yes, we are not changing anything on this driver. Is it okay?


>
>
>> +             i3c16: i3c at 80620400 {
>> +                     compatible = "cdns,i3c-master";
>> +                     reg = <0x00 0x80620400 0x00 0x400>;
>> +                     clocks = <&refclk &clk_xin>;
>> +                     clock-names = "pclk", "sysclk";
>> +                     interrupt-parent = <&gic500>;
>> +                     interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
>> +                     i2c-scl-hz = <100000>;
>> +                     i3c-scl-hz = <400000>;
>> +                     #address-cells = <3>;
>> +                     #size-cells = <0>;
>> +                     status = "disabled";
>> +             };
>> +             uart0: serial at 80520000 {
> Looks like not ordered by unit address. What is the ordering rule you
> are going to adopt for entire arch?

Apologies for the confusion. I should have updated in last patch-set 
comments.

We are following alphabetical ordering rule. In those we are grouping 
some nodes together based on the numbers.

cpus

clocks

soc {

    gic500 { }

    gpio0-7 { }

    i3c0-16 { }

    uart0-3 { }

}

timer


Is this okay?

>
>> +                     compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
> NAK, you do not have xlnx here. Look at your SoC: name of vendor is
> axiado. Not xlnx. How is your SoC called? Also zynqmp? You cannot just
> randomly pick any compatibles and stuff them around.
>
> Please carefully read writing bindings from DT directory.


We are using the "cdns,uart-r1p12" for the UART. However, that alone 
can't be added alone in the compatible as per the DT bindings doc.

So that's the reason we have used the other node. However, which is not 
proper, understood your point. Thank you for the same.


This driver' on of the compatible is "cdns,uart-r1p12". Ref: 
https://elixir.bootlin.com/linux/v6.15/source/drivers/tty/serial/xilinx_uartps.c#L1598. 


Is it okay if we edit this file 
(https://elixir.bootlin.com/linux/v6.15/source/Documentation/devicetree/bindings/serial/cdns,uart.yaml#L12) 


to have the supported "OneOf" as "cdns,uart-r1p12" ?


Regards,

Harshit.