[PATCH 04/12] perf arm_spe: Directly propagate raw event
James Clark
james.clark at linaro.org
Thu Jun 19 07:13:03 PDT 2025
On 13/06/2025 4:53 pm, Leo Yan wrote:
> Two separate sets of event bits are defined: one for used in the code
> for generating samples and another for the backend decoder. Reduce
> the redundancy by using the raw event bits directly in the frontend
> code.
>
> To avoid overflow issues, change the type of the event variable from
> enum to u64.
>
> Signed-off-by: Leo Yan <leo.yan at arm.com>
Reviewed-by: James Clark <james.clark at linaro.org>
> ---
> tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 37 +----------------------
> tools/perf/util/arm-spe-decoder/arm-spe-decoder.h | 28 ++++++++---------
> 2 files changed, 14 insertions(+), 51 deletions(-)
>
> diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
> index 688fe6d7524416420a7c18d5f8a268492ce7c3b8..96eb7cced6fd1574f5d823e4c67b9051dcf183ed 100644
> --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
> +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
> @@ -229,42 +229,7 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
> }
> break;
> case ARM_SPE_EVENTS:
> - if (payload & BIT(EV_L1D_REFILL))
> - decoder->record.type |= ARM_SPE_L1D_MISS;
> -
> - if (payload & BIT(EV_L1D_ACCESS))
> - decoder->record.type |= ARM_SPE_L1D_ACCESS;
> -
> - if (payload & BIT(EV_TLB_WALK))
> - decoder->record.type |= ARM_SPE_TLB_MISS;
> -
> - if (payload & BIT(EV_TLB_ACCESS))
> - decoder->record.type |= ARM_SPE_TLB_ACCESS;
> -
> - if (payload & BIT(EV_LLC_MISS))
> - decoder->record.type |= ARM_SPE_LLC_MISS;
> -
> - if (payload & BIT(EV_LLC_ACCESS))
> - decoder->record.type |= ARM_SPE_LLC_ACCESS;
> -
> - if (payload & BIT(EV_REMOTE_ACCESS))
> - decoder->record.type |= ARM_SPE_REMOTE_ACCESS;
> -
> - if (payload & BIT(EV_MISPRED))
> - decoder->record.type |= ARM_SPE_BRANCH_MISS;
> -
> - if (payload & BIT(EV_NOT_TAKEN))
> - decoder->record.type |= ARM_SPE_BRANCH_NOT_TAKEN;
> -
> - if (payload & BIT(EV_TRANSACTIONAL))
> - decoder->record.type |= ARM_SPE_IN_TXN;
> -
> - if (payload & BIT(EV_PARTIAL_PREDICATE))
> - decoder->record.type |= ARM_SPE_SVE_PARTIAL_PRED;
> -
> - if (payload & BIT(EV_EMPTY_PREDICATE))
> - decoder->record.type |= ARM_SPE_SVE_EMPTY_PRED;
> -
> + decoder->record.type = payload;
> break;
> case ARM_SPE_DATA_SOURCE:
> decoder->record.source = payload;
> diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
> index 881d9f29c1380b62486f0cd81498750ba06c4b50..03da55453da8fd2e7b9e2dcba3ddcf5243599e1c 100644
> --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
> +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
> @@ -13,20 +13,18 @@
>
> #include "arm-spe-pkt-decoder.h"
>
> -enum arm_spe_sample_type {
> - ARM_SPE_L1D_ACCESS = 1 << 0,
> - ARM_SPE_L1D_MISS = 1 << 1,
> - ARM_SPE_LLC_ACCESS = 1 << 2,
> - ARM_SPE_LLC_MISS = 1 << 3,
> - ARM_SPE_TLB_ACCESS = 1 << 4,
> - ARM_SPE_TLB_MISS = 1 << 5,
> - ARM_SPE_BRANCH_MISS = 1 << 6,
> - ARM_SPE_REMOTE_ACCESS = 1 << 7,
> - ARM_SPE_SVE_PARTIAL_PRED = 1 << 8,
> - ARM_SPE_SVE_EMPTY_PRED = 1 << 9,
> - ARM_SPE_BRANCH_NOT_TAKEN = 1 << 10,
> - ARM_SPE_IN_TXN = 1 << 11,
> -};
> +#define ARM_SPE_L1D_ACCESS BIT(EV_L1D_ACCESS)
> +#define ARM_SPE_L1D_MISS BIT(EV_L1D_REFILL)
> +#define ARM_SPE_LLC_ACCESS BIT(EV_LLC_ACCESS)
> +#define ARM_SPE_LLC_MISS BIT(EV_LLC_MISS)
> +#define ARM_SPE_TLB_ACCESS BIT(EV_TLB_ACCESS)
> +#define ARM_SPE_TLB_MISS BIT(EV_TLB_WALK)
> +#define ARM_SPE_BRANCH_MISS BIT(EV_MISPRED)
> +#define ARM_SPE_BRANCH_NOT_TAKEN BIT(EV_NOT_TAKEN)
> +#define ARM_SPE_REMOTE_ACCESS BIT(EV_REMOTE_ACCESS)
> +#define ARM_SPE_SVE_PARTIAL_PRED BIT(EV_PARTIAL_PREDICATE)
> +#define ARM_SPE_SVE_EMPTY_PRED BIT(EV_EMPTY_PREDICATE)
> +#define ARM_SPE_IN_TXN BIT(EV_TRANSACTIONAL)
>
> enum arm_spe_op_type {
> /* First level operation type */
> @@ -100,7 +98,7 @@ enum arm_spe_hisi_hip_data_source {
> };
>
> struct arm_spe_record {
> - enum arm_spe_sample_type type;
> + u64 type;
> int err;
> u32 op;
> u32 latency;
>
More information about the linux-arm-kernel
mailing list