[PATCH 2/5] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant
Michael Riesch via B4 Relay
devnull+michael.riesch.collabora.com at kernel.org
Tue Jun 17 01:54:43 PDT 2025
From: Michael Riesch <michael.riesch at collabora.com>
The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines.
Add the variant and allow for the additional reset.
Signed-off-by: Michael Riesch <michael.riesch at collabora.com>
---
.../bindings/phy/rockchip-inno-csi-dphy.yaml | 60 ++++++++++++++++++++--
1 file changed, 55 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
index 5ac994b3c0aa..6755738b13ee 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml
@@ -21,6 +21,7 @@ properties:
- rockchip,rk3326-csi-dphy
- rockchip,rk3368-csi-dphy
- rockchip,rk3568-csi-dphy
+ - rockchip,rk3588-csi-dphy
reg:
maxItems: 1
@@ -39,18 +40,49 @@ properties:
maxItems: 1
resets:
- items:
- - description: exclusive PHY reset line
+ minItems: 1
+ maxItems: 2
reset-names:
- items:
- - const: apb
+ minItems: 1
+ maxItems: 2
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Some additional phy settings are access through GRF regs.
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - rockchip,px30-csi-dphy
+ - rockchip,rk1808-csi-dphy
+ - rockchip,rk3326-csi-dphy
+ - rockchip,rk3368-csi-dphy
+ - rockchip,rk3568-csi-dphy
+ then:
+ properties:
+ resets:
+ items:
+ - description: exclusive PHY reset line
+
+ reset-names:
+ items:
+ - const: apb
+
+ required:
+ - reset-names
+ else:
+ properties:
+ resets:
+ minItems: 2
+
+ reset-names:
+ minItems: 2
+
required:
- compatible
- reg
@@ -59,7 +91,6 @@ required:
- '#phy-cells'
- power-domains
- resets
- - reset-names
- rockchip,grf
additionalProperties: false
@@ -78,3 +109,22 @@ examples:
reset-names = "apb";
rockchip,grf = <&grf>;
};
+ - |
+ #include <dt-bindings/clock/rockchip,rk3588-cru.h>
+ #include <dt-bindings/reset/rockchip,rk3588-cru.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ csi_dphy0: phy at fedc0000 {
+ compatible = "rockchip,rk3588-csi-dphy";
+ reg = <0x0 0xfedc0000 0x0 0x8000>;
+ clocks = <&cru PCLK_CSIPHY0>;
+ clock-names = "pclk";
+ #phy-cells = <0>;
+ resets = <&cru SRST_CSIPHY0>, <&cru SRST_P_CSIPHY0>;
+ rockchip,grf = <&csidphy0_grf>;
+ status = "disabled";
+ };
+ };
--
2.39.5
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