[PATCH v2 5/9] spi: zynqmp-gqspi: Support multiple buses

David Lechner dlechner at baylibre.com
Mon Jun 16 16:10:36 PDT 2025


On 6/16/25 5:00 PM, Sean Anderson wrote:
> Currently, selection of the upper/lower buses is determined by the
> chipselect. Decouple this by allowing explicit bus selection through the
> spi-buses property.
> 
> Signed-off-by: Sean Anderson <sean.anderson at linux.dev>
> ---
> 
> Changes in v2:
> - New
> 
>  drivers/spi/spi-zynqmp-gqspi.c | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c
> index 595b6dc10845..add5eea12153 100644
> --- a/drivers/spi/spi-zynqmp-gqspi.c
> +++ b/drivers/spi/spi-zynqmp-gqspi.c
> @@ -465,13 +465,13 @@ static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high)
>  	genfifoentry |= GQSPI_GENFIFO_MODE_SPI;
>  
>  	if (!is_high) {
> -		if (!spi_get_chipselect(qspi, 0)) {
> -			xqspi->genfifobus = GQSPI_GENFIFO_BUS_LOWER;
> +		xqspi->genfifobus =
> +			FIELD_PREP(GQSPI_GENFIFO_BUS_MASK, qspi->buses);
> +		if (!spi_get_chipselect(qspi, 0))
>  			xqspi->genfifocs = GQSPI_GENFIFO_CS_LOWER;
> -		} else {
> -			xqspi->genfifobus = GQSPI_GENFIFO_BUS_UPPER;
> +		else
>  			xqspi->genfifocs = GQSPI_GENFIFO_CS_UPPER;
> -		}
> +

We could possibly drop adding the SPI_CONTROLLER_DEFAULT_BUS_IS_CS flag
and handle the fallback here instead. Like this:

	/*
	 * If spi-buses was not provided in devicetree, assume bus is
	 * the same as chipselect (needed for backwards compatibility).
	 */
	if (qspi->buses)
		xqspi->genfifobus =
			FIELD_PREP(GQSPI_GENFIFO_BUS_MASK, qspi->buses);
	else if (spi_get_chipselect(qspi, 0) == 0)
		xqspi->genfifocs = GQSPI_GENFIFO_BUS_LOWER;
	else
		xqspi->genfifocs = GQSPI_GENFIFO_BUS_UPPER;

>  		genfifoentry |= xqspi->genfifobus;
>  		genfifoentry |= xqspi->genfifocs;
>  		genfifoentry |= GQSPI_GENFIFO_CS_SETUP;
> @@ -1316,6 +1316,8 @@ static int zynqmp_qspi_probe(struct platform_device *pdev)
>  		ctlr->num_chipselect = num_cs;
>  	}
>  
> +	ctlr->num_buses = 2;
> +	ctlr->flags = SPI_CONTROLLER_DEFAULT_BUS_IS_CS;
>  	ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
>  	ctlr->mem_ops = &zynqmp_qspi_mem_ops;
>  	ctlr->mem_caps = &zynqmp_qspi_mem_caps;




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