[PATCH v3 1/2] phy: cadence-torrent: Add PCIe multilink configuration for 100 MHz refclk
Vinod Koul
vkoul at kernel.org
Sun Jun 15 07:10:53 PDT 2025
On 12-06-25, 15:34, Siddharth Vadapalli wrote:
> On Thu, Jun 12, 2025 at 10:48:20AM +0200, Enric Balletbo i Serra wrote:
>
> Hello Enric,
>
> > Hi all,
> >
> > On Thu, Jan 9, 2025 at 5:35 PM Roger Quadros <rogerq at kernel.org> wrote:
> > >
> > >
> > >
> > > On 09/01/2025 14:16, Siddharth Vadapalli wrote:
> > > > From: Swapnil Jakhade <sjakhade at cadence.com>
> > > >
> > > > Add register sequences to support PCIe multilink configuration for 100MHz
> > > > reference clock. Maximum two PCIe links are supported.
> > > >
> > > > Signed-off-by: Swapnil Jakhade <sjakhade at cadence.com>
> > > > Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>
> > >
> > > Reviewed-by: Roger Quadros <rogerq at kernel.org>
> > >
> >
> > These patches seem good and have been reviewed but look stalled here.
> > There is any chance to rebase it on top of the mainline?
>
> The patches apply cleanly on the latest linux-next tagged next-20250612.
Can you repost
--
~Vinod
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