[RFC PATCH 1/4] PCI: pcie-rockchip: add bits for Target Link Speed in LCS_2

Geraldo Nascimento geraldogabriel at gmail.com
Tue Jun 10 13:09:39 PDT 2025


On Tue, Jun 10, 2025 at 03:07:44PM -0500, Bjorn Helgaas wrote:
> This stuff:
> 
>   #define PCIE_RC_CONFIG_DCR              (PCIE_RC_CONFIG_BASE + 0xc4)
>   #define PCIE_RC_CONFIG_DCSR             (PCIE_RC_CONFIG_BASE + 0xc8)
>   #define PCIE_RC_CONFIG_LINK_CAP         (PCIE_RC_CONFIG_BASE + 0xcc)
>   #define PCIE_RC_CONFIG_LCS              (PCIE_RC_CONFIG_BASE + 0xd0)
>   #define PCIE_RC_CONFIG_LCS_2            (PCIE_RC_CONFIG_BASE + 0xf0)
> 
> *Looks* like it might be duplicates of:
> 
>   #define PCI_EXP_DEVCAP          0x04    /* Device capabilities */
>   #define PCI_EXP_DEVCTL          0x08    /* Device Control */
>   #define PCI_EXP_LNKCAP          0x0c    /* Link Capabilities */
>   #define PCI_EXP_LNKCTL          0x10    /* Link Control */
>   #define PCI_EXP_LNKCTL2         0x30    /* Link Control 2 */
> 
> where the PCIe Capability is at (PCIE_RC_CONFIG_BASE + 0xc0).
> 
> If so, can you please rework these to use the existing PCI_EXP_*
> definitions, including the fields inside?

Hi Bjorn,

I'll look into it, good catch indeed.

Thank you for your help!
Geraldo Nascimento



More information about the linux-arm-kernel mailing list