[boot-wrapper PATCH V2] aarch64: Enable access into FEAT_SPE_FDS register from EL2 and below

Mark Rutland mark.rutland at arm.com
Tue Jun 10 10:17:24 PDT 2025


On Mon, Jun 09, 2025 at 02:36:53PM +0100, Mark Rutland wrote:
> On Fri, Jun 06, 2025 at 09:49:07AM +0100, James Clark wrote:
> > On 06/06/2025 6:26 am, Anshuman Khandual wrote:
 
> > > +	/*
> > > +	 * PMSIDR_EL1 register is present, only when FEAT_SPE
> > > +	 * feature is implemeneted. Otherwise direct accesses
> > > +	 * to PMSIDR_EL1 are UNDEFINED.
> > > +	 */
> > > +	if ((mrs_field(ID_AA64DFR0_EL1, PMSVER) >= 1) &&
> > > +	    (mrs_field(PMSIDR_EL1, FDS)))
> > 
> > Minor nit, but the extra brackets on the second condition are unnecessary.
> > Probably not worth a second version for though.
> 
> I don't think they're necessary for either condition, so when I apply
> this I'll simplify this to:
> 
> 	if (mrs_field(ID_AA64DFR0_EL1, PMSVER) >= 1 && 
> 	    mrs_field(PMSIDR_EL1, FDS))
> 
> ... and drop the comment.

Applied (with the changes above), and pushed out now.

Mark.



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