[PATCH v5 3/7] coresight-tgu: Add signal priority support

songchai quic_songchai at quicinc.com
Thu Jun 5 19:52:30 PDT 2025


On 5/29/2025 7:29 PM, Jonathan Cameron wrote:
> On Thu, 29 May 2025 16:19:44 +0800
> Songwei Chai <quic_songchai at quicinc.com> wrote:
>
>> Like circuit of a Logic analyzer, in TGU, the requirement could be
>> configured in each step and the trigger will be created once the
>> requirements are met. Add priority functionality here to sort the
>> signals into different priorities. The signal which is wanted could
>> be configured in each step's priority node, the larger number means
>> the higher priority and the signal with higher priority will be sensed
>> more preferentially.
>>
>> Signed-off-by: Songwei Chai <quic_songchai at quicinc.com>
>
>> diff --git a/drivers/hwtracing/coresight/coresight-tgu.h b/drivers/hwtracing/coresight/coresight-tgu.h
>> index 6c849a2f78fa..f07ead505365 100644
>> --- a/drivers/hwtracing/coresight/coresight-tgu.h
>> +++ b/drivers/hwtracing/coresight/coresight-tgu.h
>> @@ -13,6 +13,112 @@
>> +enum operation_index {
>> +	TGU_PRIORITY0,
>> +	TGU_PRIORITY1,
>> +	TGU_PRIORITY2,
>> +	TGU_PRIORITY3
> No blank line.  Also convention on anything other than a terminating entry
> is to leave the trailing ,
It will be adopted in the next version.
>> +
>> +};
>> +
>>   /**
>>    * struct tgu_drvdata - Data structure for a TGU (Trigger Generator Unit)
>>    * @base: Memory-mapped base address of the TGU device
>> @@ -20,6 +126,9 @@
>>    * @csdev: Pointer to the associated coresight device
>>    * @spinlock: Spinlock for handling concurrent access
>>    * @enable: Flag indicating whether the TGU device is enabled
>> + * @value_table: Store given value based on relevant parameters.
>> + * @max_reg: Maximum number of registers
>> + * @max_step: Maximum step size
>>    *
>>    * This structure defines the data associated with a TGU device,
>>    * including its base address, device pointers, clock, spinlock for
>> @@ -32,6 +141,9 @@ struct tgu_drvdata {
>>   	struct coresight_device *csdev;
>>   	spinlock_t spinlock;
>>   	bool enable;
>> +	struct value_table *value_table;
>> +	int max_reg;
>> +	int max_step;
> Ah. Here some of the bits missing in previous patch that make
> the description make more sense.  Fair enough.
Thanks.
>
>>   };
>>   
>>   #endif
>>
>>



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