[BOOT-WRAPPER PATCH] aarch64: Enable access to MPAM by EL2 and below

[Mark Rutland]

On Tue, Jun 03, 2025 at 09:49:23AM +0100, Vladimir Murzin wrote:
> Disable any EL3 traps for MPAM and reset to default PARTIDs and PMGs
> by clearing enable bit.
> 
> Signed-off-by: Vladimir Murzin <vladimir.murzin at arm.com>

Superficially this looks fine, but there's nothing about in booting.rst
in the kernel tree, which seems like an oversight.

James, are you happy that this is sufficient, or is there anything else
we might need to do at EL3?

If I don't hear anything I'll queue this by the end of the week.

Mark.

> ---
>  arch/aarch64/include/asm/cpu.h | 3 +++
>  arch/aarch64/init.c            | 5 +++++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
> index 2b3a659..ff38bf8 100644
> --- a/arch/aarch64/include/asm/cpu.h
> +++ b/arch/aarch64/include/asm/cpu.h
> @@ -143,6 +143,9 @@
>  #define HCR_EL2_RESET		HCR_EL2_RES1
>  
>  #define ID_AA64PFR0_EL1_GIC	BITS(27, 24)
> +#define ID_AA64PFR0_EL1_MPAM	BITS(43,40)
> +
> +#define MPAM3_EL3		s3_6_c10_c5_0
>  
>  /*
>   * RES1 bits,  little-endian, caches and MMU off, no alignment checking,
> diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c
> index e1640a9..b31c4f3 100644
> --- a/arch/aarch64/init.c
> +++ b/arch/aarch64/init.c
> @@ -194,6 +194,11 @@ static void cpu_init_el3(void)
>  
>  		msr(SMCR_EL3, smcr);
>  	}
> +
> +	if (mrs_field(ID_AA64PFR0_EL1, MPAM)) {
> +		/* Use the default partition and disable lower traps */
> +		msr(MPAM3_EL3, 0);
> +	}
>  }
>  
>  void cpu_init_el2_armv8r(void)
> -- 
> 2.34.1
>