[PATCH v1 staging] staging: debix-model-a: update DTS for debix model a

Krzysztof Kozlowski krzk at kernel.org
Tue Jul 29 00:09:19 PDT 2025


On 29/07/2025 05:04, WangErQian wrote:
> Update the device tree for Debix Model A
> 
> Signed-off-by: WangErQian <WangErQianY at icloud.com>

You ned to use real name.

> ---
>  .../dts/freescale/imx8mp-debix-model-a.dts    | 871 +++++++++++++++---
>  1 file changed, 752 insertions(+), 119 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> index af02af9e5334..c398be341ff8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/leds/common.h>
>  #include <dt-bindings/usb/pd.h>
> +#include <dt-bindings/phy/phy-imx8-pcie.h>
>  
>  #include "imx8mp.dtsi"
>  
> @@ -20,13 +21,22 @@ chosen {
>  		stdout-path = &uart2;
>  	};
>  
> +	bt_rfkill {

Please follow DTS coding style closely.

...

> +&ecspi1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	fsl,spi-num-chipselects = <1>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
> +	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
> +	status = "okay";
> +	spidev1: spi at 0 {
> +		reg = <0>;
> +		compatible = "rohm,dh2228fv";

No, it is not true. You do not have such thing there.

> +		spi-max-frequency = <20000000>;
> +	};
> +};
> +
> +&ecspi2 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	fsl,spi-num-chipselects = <1>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
> +	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> +	status = "okay";
> +
> +	spidev2: spi at 0 {
> +		reg = <0>;
> +		compatible = "rohm,dh2228fv";

No, not true. Drop entire node.

> +		spi-max-frequency = <20000000>;
> +	};
> +};
> +


..

>  
> +&flexcan1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan1>;
> +	//xceiver-supply = <&reg_can1_stby>;

Why are you adding dead code?

> +	status = "okay";
> +};
> +
> +&flexcan2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan2>;
> +	//xceiver-supply = <&reg_can2_stby>;
> +	//pinctrl-assert-gpios = <&pca6416 3 GPIO_ACTIVE_HIGH>;
> +	status = "okay";/* can2 pin conflict with pdm */
> +};
> +
> +&flexspi {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexspi0>;
> +	status = "disabled";
> +
> +	flash at 0 {
> +		compatible = "jedec,spi-nor";
> +		reg = <0>;
> +		spi-max-frequency = <80000000>;
> +		spi-tx-bus-width = <1>;
> +		spi-rx-bus-width = <4>;
> +	};
> +};
> +
> +&hdmi_blk_ctrl {
> +	status = "okay";
> +};
> +
>  &hdmi_pvi {
>  	status = "okay";
>  };
> @@ -114,11 +353,11 @@ &hdmi_tx {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_hdmi>;
>  	status = "okay";
> -
>  	ports {
>  		port at 1 {
> +			reg = <1>;
>  			hdmi_tx_out: endpoint {
> -				remote-endpoint = <&hdmi_connector_in>;
> +				remote-endpoint = <&hdmi_connector_out>;
>  			};
>  		};
>  	};
> @@ -128,6 +367,10 @@ &hdmi_tx_phy {
>  	status = "okay";
>  };
>  
> +&irqsteer_hdmi {
> +	status = "okay";
> +};
> +
>  &i2c1 {
>  	clock-frequency = <400000>;
>  	pinctrl-names = "default";
> @@ -140,7 +383,7 @@ pmic at 25 {
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&pinctrl_pmic>;
>  		interrupt-parent = <&gpio1>;
> -		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
> +		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
>  
>  		regulators {
>  			buck1: BUCK1 {
> @@ -163,7 +406,7 @@ buck2: BUCK2 {
>  				nxp,dvs-standby-voltage = <850000>;
>  			};
>  
> -			buck4: BUCK4 {
> +			buck4: BUCK4{
>  				regulator-name = "BUCK4";
>  				regulator-min-microvolt = <600000>;
>  				regulator-max-microvolt = <3400000>;
> @@ -171,7 +414,7 @@ buck4: BUCK4 {
>  				regulator-always-on;
>  			};
>  
> -			buck5: BUCK5 {
> +			buck5: BUCK5{
>  				regulator-name = "BUCK5";
>  				regulator-min-microvolt = <600000>;
>  				regulator-max-microvolt = <3400000>;
> @@ -231,8 +474,10 @@ ldo5: LDO5 {
>  };
>  
>  &i2c2 {
> +	clock-frequency = <400000>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_i2c2>;
> +	status = "okay";
>  };
>  
>  &i2c3 {
> @@ -240,30 +485,72 @@ &i2c3 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_i2c3>;
>  	status = "okay";
> +
> +	codec: es8316 at 10 {
> +		compatible = "everest,es8316";
> +		reg = <0x10>;
> +		clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>;
> +		clock-names = "mclk";
> +	};
>  };
>  
>  &i2c4 {
> -	clock-frequency = <100000>;
> +	clock-frequency = <50000>;

Why one patch is making so many changes?

Nothing in the commit msg explains that. Read carefully submitting
patches - it explains what you should do.


>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_i2c4>;
>  	status = "okay";
>  
> -	eeprom at 50 {
> +	eeprom1: eeprom at 50 {
>  		compatible = "atmel,24c02";
>  		reg = <0x50>;
>  		pagesize = <16>;
>  	};
>  
> -	rtc at 51 {
> +	hym8563: hym8563 at 51 {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation



>  		compatible = "haoyu,hym8563";
>  		reg = <0x51>;
>  		#clock-cells = <0>;
> +		clock-frequency = <32768>;
>  		clock-output-names = "xin32k";
> +		init_date="2022/04/12";
>  		interrupt-parent = <&gpio2>;
>  		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
> +
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&pinctrl_rtc_int>;
>  	};
> +	ads1115: ads1115 at 48 {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation



> +		compatible = "ti,ads1115";
> +		status = "okay";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		reg = <0x48>;
> +		channel at 4 {
> +		 reg = <4>;
> +		 ti,gain = <1>;
> +		 ti,datarate = <4>;
> +		};
> +		channel at 5 {
> +		 reg = <5>;
> +		 ti,gain = <1>;
> +		 ti,datarate = <4>;
> +		};
> +		channel at 3 {
> +		 reg = <3>;
> +		 ti,gain = <1>;
> +		 ti,datarate = <4>;
> +		};
> +		channel at 6 {
> +		 reg = <6>;
> +		 ti,gain = <1>;
> +		 ti,datarate = <4>;
> +		};
> +		channel at 7 {
> +		 reg = <7>;
> +		 ti,gain = <1>;
> +		 ti,datarate = <4>;
> +		};
> +	};
>  };
>  
>  &i2c6 {
> @@ -273,14 +560,85 @@ &i2c6 {
>  	status = "okay";
>  };
>  
> +&lcdif1 {
> +	status = "okay";
> +};
> +
> +&lcdif2 {
> +	status = "okay";
> +};
> +
>  &lcdif3 {
>  	status = "okay";
> +
> +	thres-low  = <1 2>;
> +	thres-high = <3 4>;
> +};
> +
> +&lvds_bridge {
> +	status = "disabled";
> +};
> +
> +&media_blk_ctrl {
> +	status = "disabled";
> +};
> +
> +&mipi_dsi {
> +	status = "disabled";
> +};
> +
> +&pcie {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pcie0>;
> +	reset-gpio = <&gpio4 27 GPIO_ACTIVE_LOW>;
> +	vpcie-supply = <&reg_pcie0>;
> +	status = "disabled";
> +};
> +
> +&pcie_phy {
> +	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> +	clocks = <&pcie0_refclk>;
> +	clock-names = "ref";
> +	status = "disabled";
> +};
> +
> +&pwm2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pwm2>;
> +	status = "disabled";
> +};
> +
> +&sai3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_sai3>;
> +	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
> +	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
> +	assigned-clock-rates = <12288000>;
> +	clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>,
> +		 <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
> +		 <&clk IMX8MP_CLK_DUMMY>;
> +	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
> +	fsl,sai-mclk-direction-output;
> +	status = "okay";
> +};
> +
> +&sdma2 {
> +	status = "okay";
>  };
>  
>  &snvs_pwrkey {
>  	status = "okay";
>  };
>  
> +&uart1 { /* BT */
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart1>;
> +	assigned-clocks = <&clk IMX8MP_CLK_UART1>;
> +	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
> +	uart-has-rtscts;
> +	status = "okay";
> +};
> +
>  &uart2 {
>  	/* console */
>  	pinctrl-names = "default";
> @@ -300,7 +658,28 @@ &uart4 {
>  	status = "okay";
>  };
>  
> +&usb3_phy0 {
> +	status = "okay";
> +};
> +
> +&usb3_0 {
> +	status = "okay";
> +};
> +
> +&usb_dwc3_0 {
> +	dr_mode = "otg";
> +	hnp-disable;
> +	srp-disable;
> +	adp-disable;
> +	usb-role-switch;
> +	snps,dis-u1-entry-quirk;
> +	snps,dis-u2-entry-quirk;
> +	status = "okay";
> +};
> +
>  &usb3_phy1 {
> +	fsl,phy-tx-preemp-amp-tune = <3>;
> +	fsl,phy-tx-vref-tune = <0xb>;
>  	status = "okay";
>  };
>  
> @@ -309,32 +688,45 @@ &usb3_1 {
>  };
>  
>  &usb_dwc3_1 {
> -	#address-cells = <1>;
> -	#size-cells = <0>;
>  	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_usb1>;
> +	pinctrl-0 = <&pinctrl_usb1_vbus>;
> +	hub-pwd-gpio = <&gpio4 26 GPIO_ACTIVE_LOW>;
> +	hub-reset-gpio = <&gpio4 25 GPIO_ACTIVE_LOW>;
>  	dr_mode = "host";
>  	status = "okay";
> +};
>  
> -	/* 2.x hub on port 1 */
> -	usb_hub_2_x: hub at 1 {
> -		compatible = "usbbda,5411";
> -		reg = <1>;
> -		vdd-supply = <&reg_usb_hub>;
> -		peer-hub = <&usb_hub_3_x>;
> -	};
> +/*WIFI */
> +&usdhc1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_wlan_wake_host>;
> +	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_wlan_wake_host>;
> +	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_wlan_wake_host>;
> +	bus-width = <4>;
> +	pm-ignore-notify;
> +	keep-power-in-suspend;
> +	non-removable;
> +	cap-power-off-card;
> +	/delete-property/ vmmc-supply;
> +	mmc-pwrseq = <&usdhc1_pwrseq>;
> +	status = "okay";
> +	max-frequency = <100000000>;
>  
> -	/* 3.x hub on port 2 */
> -	usb_hub_3_x: hub at 2 {
> -		compatible = "usbbda,411";
> -		reg = <2>;
> -		vdd-supply = <&reg_usb_hub>;
> -		peer-hub = <&usb_hub_2_x>;
> +	brcmf: bcrmf at 1 {
> +		reg = <1>;
> +		compatible = "brcm,bcm4329-fmac";
> +		interrupt-parent = <&gpio2>;
> +		interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "host-wake";
>  	};
>  };
>  
>  /* SD Card */
>  &usdhc2 {
> +	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> +	assigned-clock-rates = <400000000>;
>  	pinctrl-names = "default", "state_100mhz", "state_200mhz";
>  	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
>  	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> @@ -366,25 +758,108 @@ &wdog1 {
>  };
>  
>  &iomuxc {
> +	pinctrl_bt_ctrl: btctrlgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06        0x41
> +			MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07        0x41
> +			MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08        0x16
> +		>;
> +	};
> +
> +	pinctrl_ecspi1: ecspi1grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK		0x82
> +			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI		0x82
> +			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO		0x82
> +		>;
> +	};
> +
> +	pinctrl_ecspi1_cs: ecspi1cs {

Looks never tested.


Also:

<form letter>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC (and consider --no-git-fallback argument, so you will
not CC people just because they made one commit years ago). It might
happen, that command when run on an older kernel, gives you outdated
entries. Therefore please be sure you base your patches on recent Linux
kernel.

Tools like b4 or scripts/get_maintainer.pl provide you proper list of
people, so fix your workflow. Tools might also fail if you work on some
ancient tree (don't, instead use mainline) or work on fork of kernel
(don't, instead use mainline). Just use b4 and everything should be
fine, although remember about `b4 prep --auto-to-cc` if you added new
patches to the patchset.
</form letter>


Best regards,
Krzysztof



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