[PATCH v3 10/13] ARM: dts: aspeed: Add Facebook Fuji-data64 (AST2600) Board

[Tao Ren]

On Thu, Jul 24, 2025 at 02:53:39PM +0200, Andrew Lunn wrote:
> On Wed, Jul 23, 2025 at 06:03:49PM -0700, Tao Ren wrote:
> > On Thu, Jul 24, 2025 at 02:03:20AM +0200, Andrew Lunn wrote:
> > > > +&mac3 {
> > > > +	status = "okay";
> > > > +	phy-mode = "rgmii";
> > > 
> > > Does the PCB have extra long clock lines to implement the 2ns delay?
> > > 
> > > 	Andrew
> > 
> > Hi Andrew,
> > 
> > Thank you for catching it. I didn't notice the settings because the file
> > is copied from the exiting fuji.dts with minor changes.
> > 
> > The delay is currently introduced on MAC side (by manually setting SCU
> > registers), but I guess I can update phy-mode to "rgmii-id" so the delay
> > can be handled by the PHY?
> 
> That would be good, if it works. The problem with the current code is
> that those SCU registers are not set as part of the MAC driver, so it
> is hard to know what value they have.
> 
> 	Andrew

Hi Andrew,

I set phy-mode to rgmii-id (letting BCM54616S handle RX/TX delay) and
cleared SCU350 (MAC3/4 RGMII delay) register, but somehow BMC is not
reachable over ethernet.

Let me see if I missed other settings. I will drop the mac entry from v4
if I cannot make it work by next Monday.

Thanks,

Tao