[PATCH 15/16] arm64: dts: axis: Add initial pinctrl support

SeonGu Kang ksk4725 at coasia.com
Sun Jul 20 21:48:45 PDT 2025


2025-07-10 (목), 09:04 +0200, Krzysztof Kozlowski:
> On 10/07/2025 02:20, ksk4725 at coasia.com wrote:
> > From: SeonGu Kang <ksk4725 at coasia.com>
> > 
> > Add initial pin configuration nodes for the Axis ARTPEC-8 SoC.
> > 
> > Signed-off-by: Ravi Patel <ravi.patel at samsung.com>
> > Signed-off-by: SeonGu Kang <ksk4725 at coasia.com>
> > ---
> >  arch/arm64/boot/dts/axis/artpec-pinctrl.h     |  36 ++
> >  arch/arm64/boot/dts/axis/artpec8-grizzly.dts  |   1 +
> >  arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi | 373
> > ++++++++++++++++++
> >  arch/arm64/boot/dts/axis/artpec8.dtsi         |  17 +
> 
> This belongs to the previous patch rather. You can split board DTS,
> though.

Ok, I will move the dtsi changes to previous patch

> 
> >  4 files changed, 427 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/axis/artpec-pinctrl.h
> >  create mode 100644 arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/axis/artpec-pinctrl.h
> > b/arch/arm64/boot/dts/axis/artpec-pinctrl.h
> > new file mode 100644
> > index 000000000000..c2c1e25b7f6a
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/axis/artpec-pinctrl.h
> > @@ -0,0 +1,36 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Axis ARTPEC-8 SoC device tree pinctrl constants
> > + *
> > + * Copyright (c) 2022-2025 Samsung Electronics Co., Ltd.
> 
> First publish date was 2025, not 2022, so all these copyrights feel
> wrong.
> 

Ok, I will update the copyright year to 2025 only

> > + *             https://www.samsung.com
> > + * Copyright (c) 2022-2025  Axis Communications AB.
> > + *             https://www.axis.com
> > + */
> > +
> 
> 
> ...
> 
> > +       i2s0_idle: i2s0-idle-pins {
> > +               samsung,pins = "gpa1-4", "gpa1-5", "gpa1-6", "gpa1-
> > 7";
> > +               samsung,pin-function = <ARTPEC_PIN_FUNC_INPUT>;
> > +               samsung,pin-pud = <ARTPEC_PIN_PULL_UP>;
> > +               samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>;
> > +       };
> > +
> > +       i2s1_bus: i2s1-bus-pins {
> > +               samsung,pins = "gpa1-0", "gpa1-1", "gpa1-2", "gpa1-
> > 3";
> > +               samsung,pin-function = <ARTPEC_PIN_FUNC_3>;
> > +               samsung,pin-pud = <ARTPEC_PIN_PULL_UP>;
> > +               samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>;
> > +       };
> > +
> > +       i2s1_idle: i2s1-idle-pins {
> > +               samsung,pins = "gpa1-0", "gpa1-1", "gpa1-2", "gpa1-
> > 3";
> > +               samsung,pin-function = <ARTPEC_PIN_FUNC_INPUT>;
> > +               samsung,pin-pud = <ARTPEC_PIN_PULL_UP>;
> > +               samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>;
> > +       };
> > +
> > +       hsi2c2_bus: hsi2c2-bus-pins {
> > +               samsung,pins = "gpa0-6", "gpa0-7";
> 
> We sort nodes by pin names, usually. What sorting rule you applied
> here?
> 

Ok, I will sort the pin nodes alphabatically

> 
> 
> Best regards,
> Krzysztof



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