[PATCH net v3] net: ti: icssg-prueth: Fix buffer allocation for ICSSG

[Simon Horman]

On Thu, Jul 17, 2025 at 02:56:15PM +0200, Markus Elfring wrote:
> …
> > +++ b/drivers/net/ethernet/ti/icssg/icssg_config.c
> > @@ -288,8 +288,12 @@ static int prueth_fw_offload_buffer_setup(struct prueth_emac *emac)
> >  	int i;
> >  
> >  	addr = lower_32_bits(prueth->msmcram.pa);
> > -	if (slice)
> > -		addr += PRUETH_NUM_BUF_POOLS * PRUETH_EMAC_BUF_POOL_SIZE;
> > +	if (slice) {
> > +		if (prueth->pdata.banked_ms_ram)
> > +			addr += MSMC_RAM_BANK_SIZE;
> > +		else
> > +			addr += PRUETH_SW_TOTAL_BUF_SIZE_PER_SLICE;
> > +	}
> …
> 
> Would you like to use the following code variant?
> 
> 	if (slice)
> 		addr += ( prueth->pdata.banked_ms_ram
> 			? MSMC_RAM_BANK_SIZE
> 			: PRUETH_SW_TOTAL_BUF_SIZE_PER_SLICE);
> 
> 
> Can the usage of the conditional operator be extended another bit
> (also for the function “prueth_emac_buffer_setup” for example)?

1. (Subjective) The current code seems fine to me
2. (Objective) Your suggestion features unnecessary parentheses, and
   incorrect indentation and whitespace