[PATCH v2 0/8] Cache coherency management subsystem

[Peter Zijlstra]

On Wed, Jul 09, 2025 at 10:32:16PM -0700, dan.j.williams at intel.com wrote:

> Theoretically there could be a threshold at which a CLFLUSHOPT loop is a
> better option, but I would rather it be the case* that software CXL
> cache management is stop-gap for early generation CXL platforms.

So isn't the problem that CLFLUSH and friends take a linear address
rather than a physical address? I suppose we can use our 1:1 mapping in
this case, is all of CXL in the 1:1 map?