[PATCH v1 2/3] arm64: dts: ti: Add support for Variscite VAR-SOM-AM62P
Stefano Radaelli
stefano.radaelli21 at gmail.com
Wed Jul 9 10:16:20 PDT 2025
Hello Krzysztof,
thank you for your corrections, I completely forgot to compile with
the W=1 flag.
I'll take care of everything,
Best Regards,
Stefano
Il giorno mer 9 lug 2025 alle ore 10:46 Krzysztof Kozlowski
<krzk at kernel.org> ha scritto:
>
> On 08/07/2025 20:48, Stefano Radaelli wrote:
> > Add device tree support for the Variscite VAR-SOM-AM62P system on module.
> > This SOM is designed to be used with various carrier boards.
> >
> > The module includes:
> > - AM62Px Sitara MPU processor
> > - Up to 8GB of DDR4-3733 memory
> > - eMMC storage memory
> > - PS6522430 chip as a Power Management Integrated circuit (PMIC)
> > - Integrated 10/100/1000 Mbps Ethernet Transceiver Analog Devices ADIN1300
> > - Resistive touch panel interface controller TI TSC2046
> > - I2C interfaces
> >
> > Only SOM-specific peripherals are enabled by default. Carrier board
> > specific interfaces are left disabled to be enabled in the respective
> > carrier board device trees.
> >
> > Link: https://www.variscite.it/product/system-on-module-som/cortex-a53-krait/var-som-am62p-ti-sitara-am62px/
> >
> > Signed-off-by: Stefano Radaelli <stefano.radaelli21 at gmail.com>
> > ---
> > arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi | 379 ++++++++++++++++++
> > 1 file changed, 379 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi
> > new file mode 100644
> > index 000000000000..1d4ebc484d55
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi
> > @@ -0,0 +1,379 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Common dtsi for Variscite VAR-SOM-AM62P
> > + *
> > + * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
> > + * Copyright (C) 2025 Variscite Ltd. - https://www.variscite.com/
> > + *
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/input/input.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/leds/common.h>
> > +#include <dt-bindings/pwm/pwm.h>
> > +#include "k3-am62p5.dtsi"
> > +
> > +/ {
> > + compatible = "variscite,am62p-var-som", "ti,am62p5";
> > +
> > + iw612_pwrseq: iw612_pwrseq {
>
> Follow DTS coding style. This applies to multiple places.
>
> Also:
> Node names should be generic. See also an explanation and list of
> examples (not exhaustive) in DT specification:
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>
>
> > + compatible = "mmc-pwrseq-simple";
> > + post-power-on-delay-ms = <100>;
> > + power-off-delay-us = <10000>;
> > + reset-gpios = <&main_gpio0 54 GPIO_ACTIVE_LOW>, /* WIFI_PWR_EN */
> > + <&main_gpio0 59 GPIO_ACTIVE_LOW>; /* WIFI_EN */
> > + status = "okay";
>
> Why? Drop.
>
> > + };
> > +
> > + emmc_pwrseq: pwrseq at 0 {
>
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
> Maybe you need to update your dtschema and yamllint. Don't rely on
> distro packages for dtschema and be sure you are using the latest
> released dtschema.
>
> > + compatible = "mmc-pwrseq-emmc";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emmc_pwrseq_pins>;
> > + reset-gpios = <&main_gpio0 49 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + memory at 80000000 {
> > + /* 8G RAM */
> > + reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
> > + <0x00000008 0x80000000 0x00000001 0x80000000>;
> > + device_type = "memory";
> > + bootph-pre-ram;
> > + };
> > +
> > + opp-table {
> > + /* Add 1.4GHz OPP for am62p5-sk board. Requires VDD_CORE at 0v85 */
> > + opp-1400000000 {
> > + opp-hz = /bits/ 64 <1400000000>;
> > + opp-supported-hw = <0x01 0x0004>;
> > + clock-latency-ns = <6000000>;
> > + };
> > + };
> > +
> > + reserved_memory: reserved-memory {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > +
> > + rtos_ipc_memory_region: rtos-ipc-memory at 9b500000 {
> > + compatible = "shared-dma-pool";
> > + reg = <0x00 0x9b500000 0x00 0x00300000>;
> > + no-map;
> > + };
> > +
> > + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region at 9b800000 {
> > + compatible = "shared-dma-pool";
> > + reg = <0x00 0x9b800000 0x00 0x00100000>;
> > + no-map;
> > + };
> > +
> > + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region at 9b900000 {
> > + compatible = "shared-dma-pool";
> > + reg = <0x00 0x9b900000 0x00 0x00f00000>;
> > + no-map;
> > + };
> > +
> > + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory at 9c800000 {
> > + compatible = "shared-dma-pool";
> > + reg = <0x00 0x9c800000 0x00 0x00100000>;
> > + no-map;
> > + };
> > +
> > + wkup_r5fss0_core0_memory_region: r5f-memory at 9c900000 {
> > + compatible = "shared-dma-pool";
> > + reg = <0x00 0x9c900000 0x00 0x01e00000>;
> > + no-map;
> > + };
> > +
> > + secure_tfa_ddr: tfa at 9e780000 {
> > + reg = <0x00 0x9e780000 0x00 0x80000>;
> > + no-map;
> > + };
> > +
> > + secure_ddr: optee at 9e800000 {
> > + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
> > + no-map;
> > + };
> > + };
> > +
> > + vcc_3v3: vcc-3v3 {
>
> Please use name for all fixed regulators which matches current format
> recommendation: 'regulator-[0-9]v[0-9]'
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml?h=v6.11-rc1#n46
>
>
> Best regards,
> Krzysztof
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