[PATCH v4 5/6] dt-bindings: phy: samsung,usb3-drd-phy: add ExynosAutov920 combo SS phy

[Pritam Manohar Sutar]

Hi Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk at kernel.org>
> Sent: 06 July 2025 03:14 PM
> To: Pritam Manohar Sutar <pritam.sutar at samsung.com>
> Cc: vkoul at kernel.org; kishon at kernel.org; robh at kernel.org;
> krzk+dt at kernel.org; conor+dt at kernel.org; alim.akhtar at samsung.com;
> andre.draszik at linaro.org; peter.griffin at linaro.org; neil.armstrong at linaro.org;
> kauschluss at disroot.org; ivo.ivanov.ivanov1 at gmail.com;
> m.szyprowski at samsung.com; s.nawrocki at samsung.com; linux-
> phy at lists.infradead.org; devicetree at vger.kernel.org; linux-
> kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-samsung-
> soc at vger.kernel.org; rosa.pila at samsung.com; dev.tailor at samsung.com;
> faraz.ata at samsung.com; muhammed.ali at samsung.com;
> selvarasu.g at samsung.com
> Subject: Re: [PATCH v4 5/6] dt-bindings: phy: samsung,usb3-drd-phy: add
> ExynosAutov920 combo SS phy
> 
> On Tue, Jul 01, 2025 at 05:37:05PM +0530, Pritam Manohar Sutar wrote:
> > This phy supports USB3.1 SSP+(10Gbps) protocol and is backwards
> 
> Agian, this?
> 
> > compatible to the USB3.0 SS(5Gbps). 'Add-on USB2.0' phy is required to
> > support USB2.0 HS(480Mbps), FS(12Mbps) and LS(1.5Mbps) data rates.
> > These two phys are combined to form a combo phy.
> >
> > Add a dedicated compatible string for USB combo SS phy found in this
> > SoC. The SoC requires two clocks, named "phy" and "ref" and various
> > power supplies (regulators) for the internal circuitry to work.
> > The required voltages are:
> > * avdd075_usb - 0.75v
> > * avdd18_usb20 - 1.8v
> > * avdd33_usb20 - 3.3v
> 
> One more commitm message completely copy-pasted and completely
> uninforming. The voltages are irrelevant. Explain the architecture. This should be
> just one patch with proper full description.
> 
> >
> > Add schema only for 'USB3.1 SSP+' SS phy in this commit.
> 
> Why only? Add everything, describe everything, but not what voltages you have
> there but the architecture of the PHY.
> 

Will combine patch 3 (combo HS phy) & 5(combo SS phy) to describe combo phy and even will add some details as mentioned in cover letter.

> Best regards,
> Krzysztof