[PATCH 09/12] PCI: xgene-msi: Sanitise MSI allocation and affinity setting

[Marc Zyngier]

On Mon, 07 Jul 2025 15:57:47 +0100,
Lorenzo Pieralisi <lpieralisi at kernel.org> wrote:
> 
> On Sat, Jun 28, 2025 at 06:30:02PM +0100, Marc Zyngier wrote:

[...]

> > + * Effectively, this amounts to:
> > + * - hwirq[7]::cpu[2:0] is the target frame number
> > + * - hwirq[6:4] is the register index in any given frame
> > + * - hwirq[3:0] is the MSI data
> 
> I think that adding macros to define these subfields shifts would simplify
> reading and reviewing the code - while reviewing xgene_msi_isr() I
> realized it is hard to understand where the shifts to pack/unpack hwirq come
> from. I'd understand you don't want to use FIELD_PREP/GET on hwirq, it
> is not a HW field but rather a SW encoding you created but at least defining
> the shifts and using them throughout would help.

I have no problem using FIELD_*() for that. I've now reworked this to
make it clearer as well as added a bit more documentation on the
behaviour of the MSInRx registers (they are quite funky).

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.