[PATCH v2 1/4] Revert "pinctrl: sunxi: Fix a100 emac pin function name"
Paul Kocialkowski
paulk at sys-base.io
Mon Jul 7 09:51:52 PDT 2025
While the A100/A133 chips only expose a single EMAC, the sun50iw10 die
that they share actually has two such controllers.
One specific package, the T509 is reported to expose both ports.
Since we want to keep the pinctrl function names unique accross
packages of the same die to share a single common base dtsi, keep the
emac0 naming in order to allow the introduction of the emac1 function
in the future.
Note that the original commit also breaks the ABI between the driver
and the device-tree. It's however unlikely that anybody would have
complained about that since the a100/a133 port is still very early
and experimental.
Fixes: d4775ba60b55 ("pinctrl: sunxi: Fix a100 emac pin function name")
Signed-off-by: Paul Kocialkowski <paulk at sys-base.io>
---
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 32 ++++++++++-----------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
index 95b764ee1c0d..b97de80ae2f3 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
@@ -546,33 +546,33 @@ static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
- SUNXI_FUNCTION(0x5, "emac"), /* RXD1 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* RXD1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 0)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
- SUNXI_FUNCTION(0x5, "emac"), /* RXD0 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* RXD0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 1)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
- SUNXI_FUNCTION(0x5, "emac"), /* RXCTL */
+ SUNXI_FUNCTION(0x5, "emac0"), /* RXCTL */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 2)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
SUNXI_FUNCTION(0x3, "cir0"), /* OUT */
- SUNXI_FUNCTION(0x5, "emac"), /* CLKIN */
+ SUNXI_FUNCTION(0x5, "emac0"), /* CLKIN */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 3)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart3"), /* TX */
SUNXI_FUNCTION(0x3, "spi1"), /* CS */
- SUNXI_FUNCTION(0x5, "emac"), /* TXD1 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* TXD1 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 4)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -580,14 +580,14 @@ static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_FUNCTION(0x2, "uart3"), /* RX */
SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
SUNXI_FUNCTION(0x4, "ledc"),
- SUNXI_FUNCTION(0x5, "emac"), /* TXD0 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* TXD0 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 5)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x2, "uart3"), /* RTS */
SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
- SUNXI_FUNCTION(0x5, "emac"), /* TXCK */
+ SUNXI_FUNCTION(0x5, "emac0"), /* TXCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 6)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -595,7 +595,7 @@ static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_FUNCTION(0x2, "uart3"), /* CTS */
SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
SUNXI_FUNCTION(0x4, "spdif"), /* OUT */
- SUNXI_FUNCTION(0x5, "emac"), /* TXCTL */
+ SUNXI_FUNCTION(0x5, "emac0"), /* TXCTL */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 7)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -611,7 +611,7 @@ static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_FUNCTION(0x2, "dmic"), /* DATA0 */
SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */
- SUNXI_FUNCTION(0x5, "emac"), /* MDC */
+ SUNXI_FUNCTION(0x5, "emac0"), /* MDC */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 9)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -619,7 +619,7 @@ static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_FUNCTION(0x2, "dmic"), /* DATA1 */
SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */
- SUNXI_FUNCTION(0x5, "emac"), /* MDIO */
+ SUNXI_FUNCTION(0x5, "emac0"), /* MDIO */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 10)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -642,33 +642,33 @@ static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
SUNXI_FUNCTION(0x4, "i2s3"), /* MCLK */
- SUNXI_FUNCTION(0x5, "emac"), /* EPHY */
+ SUNXI_FUNCTION(0x5, "emac0"), /* EPHY */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 13)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x4, "i2s3"), /* BCLK */
- SUNXI_FUNCTION(0x5, "emac"), /* RXD3 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* RXD3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 14)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x4, "i2s3"), /* LRCK */
- SUNXI_FUNCTION(0x5, "emac"), /* RXD2 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* RXD2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 15)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s3_dout0"), /* DOUT0 */
SUNXI_FUNCTION(0x4, "i2s3_din1"), /* DIN1 */
- SUNXI_FUNCTION(0x5, "emac"), /* RXCK */
+ SUNXI_FUNCTION(0x5, "emac0"), /* RXCK */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 16)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION(0x3, "i2s3_dout1"), /* DOUT1 */
SUNXI_FUNCTION(0x4, "i2s3_din0"), /* DIN0 */
- SUNXI_FUNCTION(0x5, "emac"), /* TXD3 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* TXD3 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 17)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -676,7 +676,7 @@ static const struct sunxi_desc_pin a100_pins[] = {
SUNXI_FUNCTION(0x2, "cir0"), /* OUT */
SUNXI_FUNCTION(0x3, "i2s3_dout2"), /* DOUT2 */
SUNXI_FUNCTION(0x4, "i2s3_din2"), /* DIN2 */
- SUNXI_FUNCTION(0x5, "emac"), /* TXD2 */
+ SUNXI_FUNCTION(0x5, "emac0"), /* TXD2 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 18)),
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
SUNXI_FUNCTION(0x0, "gpio_in"),
--
2.49.0
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