[PATCH v9 8/9] arm64: dts: cix: Add sky1 base dts initial support

[Krzysztof Kozlowski]

On 09/06/2025 05:16, Peter Chen wrote:
> +
> +	firmware {
> +		ap_to_pm_scmi: scmi {
> +			compatible = "arm,scmi";
> +			mbox-names = "tx", "rx";
> +			mboxes = <&mbox_ap2pm 8>, <&mbox_pm2ap 8>;
> +			shmem = <&ap2pm_scmi_mem &pm2ap_scmi_mem>;

These are two entries, so two <>.

> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			scmi_clk: protocol at 14 {
> +				reg = <0x14>;
> +				#clock-cells = <1>;
> +			};
> +

Drop blank line

> +		};
> +	};
> +
> +	pmu-a520 {
> +		compatible = "arm,cortex-a520-pmu";
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_partition0>;
> +	};
> +
> +	pmu-a720 {
> +		compatible = "arm,cortex-a720-pmu";
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_partition1>;
> +	};
> +


...

> +
> +		mbox_ap2se: mailbox at 5060000 {
> +			compatible = "cix,sky1-mbox";
> +			reg = <0x0 0x05060000 0x0 0x10000>;
> +			interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH 0>;
> +			#mbox-cells = <1>;
> +			cix,mbox-dir = "tx";
> +		};
> +
> +		mbox_se2ap: mailbox at 5070000 {
> +			compatible = "cix,sky1-mbox";
> +			reg = <0x0 0x05070000 0x0 0x10000>;
> +			interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH 0>;
> +			#mbox-cells = <1>;
> +			cix,mbox-dir = "rx";
> +		};
> +
> +		ap2pm_scmi_mem: ap2pm-shmem at 6590000 {

This should be just shmem@

> +			compatible = "arm,scmi-shmem";
> +			reg = <0x0 0x06590000 0x0 0x80>;
> +			reg-io-width = <4>;
> +		};
> +
> +		mbox_ap2pm: mailbox at 6590080 {
> +			compatible = "cix,sky1-mbox";
> +			reg = <0x0 0x06590080 0x0 0xff80>;
> +			interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0>;
> +			#mbox-cells = <1>;
> +			cix,mbox-dir = "tx";
> +		};
> +
> +		pm2ap_scmi_mem: pm2ap-shmem at 65a0000 {

Same here

> +			compatible = "arm,scmi-shmem";
> +			reg = <0x0 0x065a0000 0x0 0x80>;
> +			reg-io-width = <4>;
> +		};
Best regards,
Krzysztof