[PATCH v3 4/4] arm64: dts: s32g: Add USB device tree information for s32g2/s32g3

[Xu Yang]

Hi Dan Carpenter,

On Thu, Jul 03, 2025 at 08:20:44PM -0500, Dan Carpenter wrote:
> This adds the USB support for the s32g2 and s32g3 SoCs.

./scripts/checkpatch.pl --strict report many errors and warnings:

ERROR: code indent should use tabs where possible
#63: FILE: arch/arm64/boot/dts/freescale/s32g3.dtsi:444:
+                usbotg: usb at 44064000 {$

ERROR: code indent should use tabs where possible
#64: FILE: arch/arm64/boot/dts/freescale/s32g3.dtsi:445:
+                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";$

WARNING: please, no spaces at the start of a line
#64: FILE: arch/arm64/boot/dts/freescale/s32g3.dtsi:445:
+                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";$

...

Refer to:
https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.html#indentation-and-wrapping

> 
> Signed-off-by: Dan Carpenter <dan.carpenter at linaro.org>
> ---
> v3: New patch
> 
>  arch/arm64/boot/dts/freescale/s32g2.dtsi | 23 +++++++++++++++++++++++
>  arch/arm64/boot/dts/freescale/s32g3.dtsi | 23 +++++++++++++++++++++++
>  2 files changed, 46 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index ea1456d361a3..4be6534ed01d 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -376,6 +376,29 @@ uart1: serial at 401cc000 {
>  			status = "disabled";
>  		};
>  
> +		usbmisc: usbmisc at 44064200 {
> +			#index-cells = <1>;
> +			compatible = "nxp,s32g2-usbmisc";

The "compatible" property should be the first one. And the property order
in other nodes need to be optimized. Refer to:
https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node

> +			reg = <0x44064200 0x200>;
> +		};
> +
> +		usbotg: usb at 44064000 {
> +			compatible = "nxp,s32g2-usb";
> +			reg = <0x44064000 0x200>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
> +					 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
> +			clocks = <&clks 94>, <&clks 95>;
> +			fsl,usbmisc = <&usbmisc 0>;
> +			ahb-burst-config = <0x3>;
> +			tx-burst-size-dword = <0x10>;
> +			rx-burst-size-dword = <0x10>;
> +			phy_type = "ulpi";
> +			dr_mode = "host";
> +			maximum-speed = "high-speed";
> +			status = "disabled";
> +		};
> +
>  		i2c0: i2c at 401e4000 {
>  			compatible = "nxp,s32g2-i2c";
>  			reg = <0x401e4000 0x1000>;
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index 991dbfbfa203..191d2dab4254 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> @@ -435,6 +435,29 @@ uart1: serial at 401cc000 {
>  			status = "disabled";
>  		};
>  
> +		usbmisc: usbmisc at 44064200 {
> +			#index-cells = <1>;
> +			compatible = "nxp,s32g3-usbmisc";
> +			reg = <0x44064200 0x200>;
> +		};
> +
> +                usbotg: usb at 44064000 {
> +                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";
> +                        reg = <0x44064000 0x200>;
> +                        interrupt-parent = <&gic>;
> +                        interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
> +                                     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
> +                        clocks = <&clks 94>, <&clks 95>;
> +                        fsl,usbmisc = <&usbmisc 0>;
> +                        ahb-burst-config = <0x3>;
> +                        tx-burst-size-dword = <0x10>;
> +                        rx-burst-size-dword = <0x10>;
> +                        phy_type = "ulpi";
> +                        dr_mode = "host";
> +                        maximum-speed = "high-speed";
> +                        status = "disabled";
> +                };
> +
>  		i2c0: i2c at 401e4000 {
>  			compatible = "nxp,s32g3-i2c",
>  				     "nxp,s32g2-i2c";
> -- 
> 2.47.2
>