[PATCH v2 0/2] Enable CTCU device for QCS8300
Jie Gan
quic_jiegan at quicinc.com
Fri Jul 4 01:07:41 PDT 2025
On 7/4/2025 3:54 PM, Krzysztof Kozlowski wrote:
> On 25/06/2025 02:59, Jie Gan wrote:
>>
>>
>> On 6/24/2025 5:59 PM, Jie Gan wrote:
>>> Enable CTCU device for QCS8300 platform. Add a fallback mechnasim in binding to utilize
>>> the compitable of the SA8775p platform becuase the CTCU for QCS8300 shares same
>>> configurations as SA8775p platform.
>>
>> Hi dear maintainers,
>>
>> I just realized it would be more efficient to introduce a common
>> compatible string for SoCs that include two TMC ETR devices.
>>
>> Most of these SoCs share the same CTCU data configuration, such as the
>
> "Most" basically disqualifies your idea.
Okay, it's not a proper expression.
SoCs included two ETR devices shared same configuration. So I think use
a common compatible for these SoCs is make sense for me and dont need to
update the dt-binding again and again...
I will send a new patch to address this idea if it's acceptable.
>
>> offsets for the ATID and IRQ registers, because they integrate the same
>> version of the CTCU hardware.
>>
>> So I propose introducing a common compatible string,
>> "coresight-ctcu-v2", to simplify the device tree configuration for these
>> platforms.
>
> This is explained in writing bindings.
Yeah, explained in the code lines..
Thanks,
Jie
>
> Best regards,
> Krzysztof
More information about the linux-arm-kernel
mailing list