[PATCH v7 19/31] arm64: Add support for GICv5 GSB barriers

Catalin Marinas catalin.marinas at arm.com
Thu Jul 3 09:04:47 PDT 2025


On Thu, Jul 03, 2025 at 12:25:09PM +0200, Lorenzo Pieralisi wrote:
> The GICv5 architecture introduces two barriers instructions
> (GSB SYS, GSB ACK) that are used to manage interrupt effects.
> 
> Rework macro used to emit the SB barrier instruction and implement
> the GSB barriers on top of it.
> 
> Suggested-by: Marc Zyngier <maz at kernel.org>
> Signed-off-by: Lorenzo Pieralisi <lpieralisi at kernel.org>
> Reviewed-by: Marc Zyngier <maz at kernel.org>
> Cc: Will Deacon <will at kernel.org>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Marc Zyngier <maz at kernel.org>

Acked-by: Catalin Marinas <catalin.marinas at arm.com>



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