[PATCH v19 09/10] pci: imx6: Add LUT setting for MSI/IOMMU in Endpoint mode

[Manivannan Sadhasivam]

On Mon, Jun 09, 2025 at 12:34:21PM GMT, Frank Li wrote:
> Support only one physical function, so call imx_pcie_add_lut_by_rid(0)
> to add a single LUT entry when operating in EP mode.
> 

So previously LUT config was not present and endpoint mode continued to work?
Please explain why this is necessary now.

- Mani

> Signed-off-by: Frank Li <Frank.Li at nxp.com>
> ---
> change from v14 to v16
> - none
> 
> change from v13 to v14
> - new patch
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 032b906c44dfa..3123bf49e209c 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -1063,7 +1063,10 @@ static int imx_pcie_add_lut(struct imx_pcie *imx_pcie, u16 rid, u8 sid)
>  	data1 |= IMX95_PE0_LUT_VLD;
>  	regmap_write(imx_pcie->iomuxc_gpr, IMX95_PE0_LUT_DATA1, data1);
>  
> -	data2 = IMX95_PE0_LUT_MASK; /* Match all bits of RID */
> +	if (imx_pcie->drvdata->mode == DW_PCIE_EP_TYPE)
> +		data2 = 0x7; /* EP side's RID from RC, only 'D' is meansful */
> +	else
> +		data2 = IMX95_PE0_LUT_MASK; /* Match all bits of RID */
>  	data2 |= FIELD_PREP(IMX95_PE0_LUT_REQID, rid);
>  	regmap_write(imx_pcie->iomuxc_gpr, IMX95_PE0_LUT_DATA2, data2);
>  
> @@ -1767,6 +1770,9 @@ static int imx_pcie_probe(struct platform_device *pdev)
>  		ret = imx_add_pcie_ep(imx_pcie, pdev);
>  		if (ret < 0)
>  			return ret;
> +
> +		/* Only support one physical function */
> +		imx_pcie_add_lut_by_rid(imx_pcie, 0);
>  	} else {
>  		pci->pp.use_atu_msg = true;
>  		ret = dw_pcie_host_init(&pci->pp);
> 
> -- 
> 2.34.1
> 

-- 
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