[PATCH v5 -next 03/11] irqchip: Add Broadcom bcm2712 MSI-X interrupt controller

[Florian Fainelli]

On 1/27/25 10:10, Thomas Gleixner wrote:
> On Mon, Jan 20 2025 at 15:01, Stanimir Varbanov wrote:
> 
>> Add an interrupt controller driver for MSI-X Interrupt Peripheral (MIP)
>> hardware block found in bcm2712. The interrupt controller is used to
>> handle MSI-X interrupts from peripherials behind PCIe endpoints like
>> RP1 south bridge found in RPi5.
>>
>> There are two MIPs on bcm2712, the first has 64 consecutive SPIs
>> assigned to 64 output vectors, and the second has 17 SPIs, but only
>> 8 of them are consecutive starting at the 8th output vector.
>>
>> Signed-off-by: Stanimir Varbanov <svarbanov at suse.de>
> 
> Reviewed-by: Thomas Gleixner <tglx at linutronix.de>
> 
> As this is a new controller and required for the actual PCI muck, I
> think the best way is to take it through the PCI tree, unless someone
> wants me to pick the whole lot up.

Agreed, the PCI maintainers should take patches 1 through 9 inclusive, 
and I will take patches 10-11 through the Broadcom ARM SoC tree, Bjorn, 
KW, does that work?
-- 
Florian