[PATCH] arm64: dts: renesas: r8a779g0: Restore sort order
Niklas Söderlund
niklas.soderlund at ragnatech.se
Mon Jan 20 04:55:18 PST 2025
Hi Geert,
Thanks for your work.
On 2025-01-20 12:09:12 +0100, Geert Uytterhoeven wrote:
> Numerical by unit address, but grouped by type.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas at ragnatech.se>
> ---
> To be queued in renesas-devel for v6.15.
>
> arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 80 +++++++++++------------
> 1 file changed, 40 insertions(+), 40 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> index 89049e40086c2d41..cbc4680e497734d3 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> @@ -2171,6 +2171,24 @@ fcpvd1: fcp at fea11000 {
> iommus = <&ipmmu_vi1 7>;
> };
>
> + fcpvx0: fcp at fedb0000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfedb0000 0 0x200>;
> + clocks = <&cpg CPG_MOD 1100>;
> + power-domains = <&sysc R8A779G0_PD_A3ISP0>;
> + resets = <&cpg 1100>;
> + iommus = <&ipmmu_vi1 24>;
> + };
> +
> + fcpvx1: fcp at fedb8000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfedb8000 0 0x200>;
> + clocks = <&cpg CPG_MOD 1101>;
> + power-domains = <&sysc R8A779G0_PD_A3ISP1>;
> + resets = <&cpg 1101>;
> + iommus = <&ipmmu_vi1 25>;
> + };
> +
> vspd0: vsp at fea20000 {
> compatible = "renesas,vsp2";
> reg = <0 0xfea20000 0 0x7000>;
> @@ -2193,6 +2211,28 @@ vspd1: vsp at fea28000 {
> renesas,fcp = <&fcpvd1>;
> };
>
> + vspx0: vsp at fedd0000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfedd0000 0 0x8000>;
> + interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1028>;
> + power-domains = <&sysc R8A779G0_PD_A3ISP0>;
> + resets = <&cpg 1028>;
> +
> + renesas,fcp = <&fcpvx0>;
> + };
> +
> + vspx1: vsp at fedd8000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfedd8000 0 0x8000>;
> + interrupts = <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1029>;
> + power-domains = <&sysc R8A779G0_PD_A3ISP1>;
> + resets = <&cpg 1029>;
> +
> + renesas,fcp = <&fcpvx1>;
> + };
> +
> du: display at feb00000 {
> compatible = "renesas,du-r8a779g0";
> reg = <0 0xfeb00000 0 0x40000>;
> @@ -2453,46 +2493,6 @@ port at 1 {
> };
> };
>
> - fcpvx0: fcp at fedb0000 {
> - compatible = "renesas,fcpv";
> - reg = <0 0xfedb0000 0 0x200>;
> - clocks = <&cpg CPG_MOD 1100>;
> - power-domains = <&sysc R8A779G0_PD_A3ISP0>;
> - resets = <&cpg 1100>;
> - iommus = <&ipmmu_vi1 24>;
> - };
> -
> - fcpvx1: fcp at fedb8000 {
> - compatible = "renesas,fcpv";
> - reg = <0 0xfedb8000 0 0x200>;
> - clocks = <&cpg CPG_MOD 1101>;
> - power-domains = <&sysc R8A779G0_PD_A3ISP1>;
> - resets = <&cpg 1101>;
> - iommus = <&ipmmu_vi1 25>;
> - };
> -
> - vspx0: vsp at fedd0000 {
> - compatible = "renesas,vsp2";
> - reg = <0 0xfedd0000 0 0x8000>;
> - interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1028>;
> - power-domains = <&sysc R8A779G0_PD_A3ISP0>;
> - resets = <&cpg 1028>;
> -
> - renesas,fcp = <&fcpvx0>;
> - };
> -
> - vspx1: vsp at fedd8000 {
> - compatible = "renesas,vsp2";
> - reg = <0 0xfedd8000 0 0x8000>;
> - interrupts = <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cpg CPG_MOD 1029>;
> - power-domains = <&sysc R8A779G0_PD_A3ISP1>;
> - resets = <&cpg 1029>;
> -
> - renesas,fcp = <&fcpvx1>;
> - };
> -
> prr: chipid at fff00044 {
> compatible = "renesas,prr";
> reg = <0 0xfff00044 0 4>;
> --
> 2.43.0
>
>
--
Kind Regards,
Niklas Söderlund
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