[PATCH 0/7] arm64/boot: Enable EL2 requirements for FEAT_PMUv3p9

Rob Herring robh at kernel.org
Fri Jan 17 14:07:56 PST 2025


On Thu, Jan 16, 2025 at 9:32 AM Catalin Marinas <catalin.marinas at arm.com> wrote:
>
> On Wed, Jan 08, 2025 at 07:47:16AM -0600, Rob Herring wrote:
> > On Wed, Jan 8, 2025 at 5:15 AM Marc Zyngier <maz at kernel.org> wrote:
> > > On Tue, 07 Jan 2025 22:13:47 +0000,
> > > Rob Herring <robh at kernel.org> wrote:
> > > > On Tue, Jan 7, 2025 at 6:13 AM Catalin Marinas <catalin.marinas at arm.com> wrote:
> > > > > But does KVM actually expose the feature to EL1 in ID_AA64DFR1_EL1 and
> > > > > than traps it at EL2?
> > > >
> > > > As Marc pointed out KVM only advertises PMUv3.8. Regardless, guest
> > > > accesses to these registers are trapped with or without this series.
> > >
> > > And most probably generates a nice splat in the kernel log, as nobody
> > > updated KVM to handle *correctly* PMICNTR_EL0 traps, let alone deal
> > > with the FGT2 registers.
> >
> > Isn't that this series[1]? Should that have come first, I guess I know
> > that *now*.
> [...]
> > [1] https://lore.kernel.org/all/20241210055311.780688-1-anshuman.khandual@arm.com/
>
> It's not any clearer to me. Does this series depend on the 46-patch one?
> Or, if we had the other, is this no longer needed? Or none of these,
> they are independent.

They are independent. I think ideally we'd want everything landing at
the same time, but we're past ideal at this point. Without this
series, if someone uses PMU on v8.9 and firmware enabled FGT2, then
the kernel will crash. Without the above series, KVM will have
warnings in the kernel log, but otherwise function.

Rob



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